A hardwired CPU uses 10 control signals S1 to S10, in various time steps T1 to…
2005
A hardwired CPU uses 10 control signals S1 to S10, in various time steps T1 to T5, to implement 4 instructions I1 to I4 as shown below:
Which of the following pairs of expressions represent the circuit for generating control signals S5 and S10 respectively?
((Ij+Ik)Tn indicates that the control signal should be generated in time step Tn if the instruction being executed is Ij or lk)
- A.
S5=T1+I2⋅T3 and S10=(I1+I3)⋅T4+(I2+I4)⋅T5
- B.
S5=T1+(I2+I4)⋅T3 and S10=(I1+I3)⋅T4+(I2+I4)⋅T5
- C.
S5=T1+(I2+I4)⋅T3 and S10=(I2+I3+I4)⋅T2+(I1+I3)⋅T4+(I2+I4)⋅T5
- D.
S5=T1+(I2+I4)⋅T3 and S10=(I2+I3)⋅T2+I4⋅T3+(I1+I3)⋅T4+(I2+I4)⋅T5
Attempted by 15 students.
Show answer & explanation
Correct answer: D
To determine the correct expressions for control signals S5 and S10, analyze the table to identify when each signal is active for each instruction and time step.
For S5:
Step 1: S5 is active in T1 for all instructions (I1, I2, I3, I4), so T1 is included in the expression.
Step 2: S5 is active in T3 for I2 and I4, so (I2+I4)⋅T3 is included.
Step 3: S5 is not active in T2, T4, or T5 for any instruction, so no other terms are needed.
Thus, the expression for S5 is T1+(I2+I4)⋅T3.
For S10:
Step 1: S10 is active in T4 for I1 and I3, so (I1+I3)⋅T4 is included.
Step 2: S10 is active in T5 for I2 and I4, so (I2+I4)⋅T5 is included.
Step 3: S10 is not active in T1, T2, or T3 for any instruction, so no other terms are needed.
Thus, the expression for S10 is (I1+I3)⋅T4+(I2+I4)⋅T5.