Consider a machine with a 2-way set associative data cache of size 64 Kbytes…
2008
Consider a machine with a 2-way set associative data cache of size 64 Kbytes and block size 16 bytes. The cache is managed using 32 bit virtual addresses and the page size is 4 Kbytes. A program to be run on this machine begins as follows:
double ARR[1024][1024];
int i, j;
/*Initialize array ARR to 0.0 */
for(i = 0; i < 1024; i++)
for(j = 0; j < 1024; j++)
ARR[i][j] = 0.0;The size of double is 8 bytes. Array ARR is located in memory starting at the beginning of virtual page 0XFF000 and stored in row major order. The cache is initially empty and no pre-fetching is done. The only data memory references made by the program are those to array ARR.
Consider the data given in above question. Which of the following array elements has the same cache index as ARR[0][0]?
- A.
ARR[0][4]
- B.
ARR[4][0]
- C.
ARR[0][5]
- D.
ARR[5][0]
Attempted by 102 students.
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Correct answer: B
Key idea: determine addresses using row-major layout and compare their cache-index calculation.
Step 1 — Address formula for row-major arrays:
address(ARR[i][j]) = base + ((i × C + j) × E)
C = number of columns in each row, E = size of one element in bytes.
Step 2 — How cache index is computed:
index = (address / L) mod S
L = cache line size in bytes, S = number of cache sets. Two addresses map to the same index when their difference is a multiple of L × S (equivalently the same remainder after dividing by L × S).
Step 3 — Compute the address difference between ARR[4][0] and ARR[0][0]:
Δ = address(ARR[4][0]) − address(ARR[0][0]) = (4 × C × E).
Step 4 — Use the cache parameters given in the earlier part of the question:
Plugging in the problem's values for C, E, L and S shows that Δ equals a multiple of L × S (the cache set stride). Therefore the two addresses produce the same (address / L) mod S result.
Conclusion: ARR[4][0] maps to the same cache index as ARR[0][0] because their address difference is a multiple of the cache set stride. Hence ARR[4][0] is the correct element that shares the cache index with ARR[0][0].