A computer has a 256 KByte, 4-way set associative, write back data cache with…
2012
A computer has a 256 KByte, 4-way set associative, write back data cache with block size of 32 Bytes. The processor sends 32 bit addresses to the cache controller. Each cache tag directory entry contains, in addition to address tag, 2 valid bits, 1 modified bit and 1 replacement bit.
The size of the cache tag directory is
- A.
160 Kbits
- B.
136 Kbits
- C.
40 Kbits
- D.
32 Kbits
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Correct answer: A
Final answer: 160 Kbits
Compute number of blocks: 256 KByte = 256 × 1024 = 262144 bytes. With 32 B blocks, number of blocks = 262144 / 32 = 8192.
Determine sets and index bits: 4-way set associative → number of sets = 8192 / 4 = 2048. Index bits = log2(2048) = 11 bits.
Block offset bits: block size 32 B → offset = log2(32) = 5 bits.
Tag bits per entry: 32-bit address − (index bits + offset bits) = 32 − (11 + 5) = 16 bits.
Bits per tag directory entry: tag bits + status bits = 16 + (2 valid + 1 modified + 1 replacement) = 16 + 4 = 20 bits.
Total tag directory size: number of blocks × bits per entry = 8192 × 20 = 163840 bits = 160 × 1024 bits = 160 Kbits.
Therefore, the size of the cache tag directory is 163840 bits, which is 160 Kbits.
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