A computer has a 256 KByte, 4-way set associative, write back data cache with…
20122025
A computer has a 256 KByte, 4-way set associative, write back data cache with block size of 32 Bytes. The processor sends 32 bit addresses to the cache controller. Each cache tag directory entry contains, in addition to address tag, 2 valid bits, 1 modified bit and 1 replacement bit.
The number of bits in the tag field of an address is
- A.
11
- B.
14
- C.
16
- D.
27
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Correct answer: C
Key insight: split the 32-bit address into tag, index (set), and block offset.
Block offset = log2(block size) = log2(32) = 5 bits.
Number of blocks = 256 KB / 32 B = 262144 / 32 = 8192 blocks.
Number of sets = blocks / associativity = 8192 / 4 = 2048 sets, so index = log2(2048) = 11 bits.
Tag bits = 32 (address bits) - index (11) - offset (5) = 16 bits.
Note: The additional bits stored per tag entry (the two valid bits, modified bit, and replacement bit) are metadata stored alongside the tag; they do not change the number of bits in the address tag field.
Answer: 16 bits.
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