The size of the physical address space of a processor is 2^π bytes. The wordβ¦
2018
The size of the physical address space of a processor is 2^π bytes. The word length is 2^π bytes. The capacity of cache memory is 2^π bytes. The size of each cache block is 2^π words. For a πΎ-way set-associative cache memory, the length (in number of bits) of the tag field is
- A.
π β π β log2Β πΎ
- B.
π β π + log2Β πΎ
- C.
π β π β π β π β log2Β πΎ
- D.
π β π β π β π + log2Β πΎ
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Correct answer: B
Key idea: compute index bits from the number of sets, compute offset bits from block size, then tag = total address bits β index β offset.
Block size in bytes = 2^M words Γ 2^W bytes/word = 2^(M+W) bytes.
Number of sets = cache capacity / (K Γ block size) = 2^N / (K Γ 2^(M+W)) = 2^(N - M - W - log2 K).
Index bits = N - M - W - log2 K. Offset (block + byte within word) bits = M + W.
Tag bits = P - index - offset = P - (N - M - W - log2 K) - (M + W) = P - N + log2 K.
Answer: The tag field length is P - N + log2 K bits.
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