A computer system has an L1 cache, an L2 cache, and a main memory unit…
2010
A computer system has an L1 cache, an L2 cache, and a main memory unit connected as shown below. The block size in L1 cache is 4 words. The block size in L2 cache is 16 words. The memory access times are 2 nanoseconds. 20 nanoseconds and 200 nanoseconds for L1 cache, L2 cache and main memory unit respectively.
When there is a miss in L1 cache and a hit in L2 cache, a block is transferred from L2 cache to L1 cache. What is the time taken for this transfer?
- A.
2 nanoseconds
- B.
20 nanoseconds
- C.
22 nanoseconds
- D.
88 nanoseconds
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Correct answer: C
Answer: 22 nanoseconds.
Reason:
On an L1 miss with a hit in L2, L2 supplies the block required by L1. The L1 block size is 4 words.
L2 cache access latency is 20 nanoseconds to locate and begin supplying the data.
The data bus between L2 and L1 transfers 4 words at a time, which exactly matches the 4-word L1 block, so the entire block is sent in one transfer. The transfer latency for that block is 2 nanoseconds (the L1 access/transfer time).
Total time = L2 access latency (20 ns) + block transfer time (2 ns) = 22 ns.
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