A computer has a memory hierarchy consisting of two-level cache (L1 and L2)…
2025
A computer has a memory hierarchy consisting of two-level cache (L1 and L2) and a main memory. If the processor needs to access data from memory, it first looks into L1 cache. If the data is not found in L1 cache, it goes to L2 cache. If it fails to get the data from L2 cache, it goes to main memory, where the data is definitely available. Hit rates and access times of various memory units are shown in the figure. The average memory access time in nanoseconds (ns) is ________. (rounded off to two decimal places)
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Correct answer: 11.85
Answer: 11.85 ns (rounded to two decimals)
Explanation and steps:
L1 cache: hit rate = 95% (0.95), access time = 10 ns. On an L1 miss (5% of accesses) the processor goes to L2.
L2 cache: conditional hit rate given an L1 miss = 85% (0.85), access time = 20 ns (this value already includes the L1 miss penalty). On an L2 miss (15% of L1 misses) the processor goes to main memory.
Main memory: access time = 200 ns (this includes the penalties from L1 and L2 misses).
Compute the average memory access time (AMAT):
AMAT = (probability of L1 hit) × (L1 time) + (probability of L1 miss) × [ (probability of L2 hit given L1 miss) × (L2 time) + (probability of L2 miss given L1 miss) × (main memory time) ]
AMAT = 0.95 × 10 + 0.05 × [0.85 × 20 + 0.15 × 200]
Calculate inner bracket: 0.85 × 20 = 17; 0.15 × 200 = 30; sum = 47
So AMAT = 0.95 × 10 + 0.05 × 47 = 9.5 + 2.35 = 11.85 ns
Final answer: 11.85 ns
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