In a two-level cache system, the access times of \(L_1\) and \(L_2\) caches…
2017
In a two-level cache system, the access times of \(L_1\) and \(L_2\) caches are 1 and 8 clock cycles, respectively. The miss penalty from the \(L_2\) cache to main memory is 18 clock cycles. The miss rate of \(L_1\) cache is twice that of\(L_2\). The average memory access time (AMAT) of this cache system is 2 cycles. The miss rates of \(L_1\) and \(L_2\) respectively are
- A.
0.111 and 0.056
- B.
0.056 and 0.111
- C.
0.0892 and 0.1784
- D.
0.1784 and 0.0892
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Correct answer: A
Key idea: the two-level AMAT includes L1 time plus L1 misses that pay the L2 access time and, on L2 misses, the memory penalty.
AMAT formula and given values:
AMAT = t_L1 + m1*(t_L2 + m2 * Penalty_to_memory).
t_L1 = 1, t_L2 = 8, Penalty_to_memory = 18, and m1 = 2*m2. AMAT is given as 2.
Solve step by step:
2 = 1 + m1*(8 + 18*m2). Substitute m1 = 2*m2: 2 = 1 + 2*m2*(8 + 18*m2).
Simplify to a quadratic: 36*m2^2 + 16*m2 - 1 = 0. Solve for m2: m2 = 1/18 ≈ 0.0556.
Then m1 = 2*m2 = 1/9 ≈ 0.1111.
Answer: The L1 miss rate ≈ 0.111 and the L2 miss rate ≈ 0.056.
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