Let WB and WT be two set associative cache organizations that use LRU…

2022

Let WB and WT be two set associative cache organizations that use LRU algorithm for cache block replacement. WB is a write back cache and WT is a write through cache. Which of the following statements is/are FALSE?

  1. A.

    Each cache block in WB and WT has a dirty bit.

  2. B.

    Every write hit in WB leads to a data transfer from cache to main memory.

  3. C.

    Eviction of a block from WT will not lead to data transfer from cache to main memory.

  4. D.

    A read miss in WB will never lead to eviction of a dirty block from WB.

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Correct answer: A, B, D

Answer (statements that are FALSE):

  • Each cache block in WB and WT has a dirty bit.

  • Every write hit in WB leads to a data transfer from cache to main memory.

  • A read miss in WB will never lead to eviction of a dirty block from WB.

Why these are false:

  • Write-back caches use a dirty bit to mark modified blocks; write-through caches update main memory on each write, so a dirty bit is generally unnecessary there.

  • In write-back, a write hit updates the cache and sets the dirty bit. The actual transfer to main memory occurs later (e.g., on eviction), not on every write hit.

  • A read miss that brings a new block into a full set can evict an existing block; if that evicted block is dirty in a write-back cache, it must be written back to main memory.

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