In comparison with static RAM memory, the dynamic Ram memory has

Key concept: A memory cell's physical design — how many transistors and capacitors it uses to hold one bit — sets both how many bits fit in a given chip area (bit density) and how much current the cell draws to retain its state (power consumption).

Cell design: A DRAM cell uses a single transistor and a single capacitor (1T-1C) to store one bit. An SRAM cell uses a cross-coupled pair of inverters — typically six transistors (6T) — to hold the same one bit.

Applying it here:

• Bit density: Because a DRAM cell needs far fewer components than an SRAM cell, many more DRAM cells fit into the same chip area, giving DRAM the higher bit density.

• Power consumption: In the comparison this question tests, SRAM's six transistors are taken to need continuous biasing to hold their state, drawing steady current for as long as the bit is stored, while a DRAM cell's capacitor holds its charge passively and needs only a brief refresh pulse every few milliseconds — making that refresh overhead far smaller than SRAM's continuous draw, so DRAM comes out with the lower power consumption per bit.

A note on refresh: many general SRAM/DRAM tutorials call out DRAM's periodic refresh as a power cost, and that cost is real — but for this comparison (and this exam's accepted key), that refresh burst is brief and infrequent next to the continuous bias current SRAM's six transistors draw for as long as a bit is held, so DRAM's overall power consumption per bit still comes out lower.

Ruling out the other combinations:

• lower bit density and higher power consumption gets both properties backwards: fewer components per DRAM cell means more bits per unit area, not fewer, and a capacitor's occasional refresh pulse draws far less current than continuously biasing six transistors.

• higher bit density and higher power consumption is right that DRAM packs more bits per chip, but wrongly assumes the periodic refresh pulses outweigh the steady current SRAM's transistors draw just to hold a bit — refresh is brief and infrequent by comparison.

• lower bit density and lower power consumption is right that DRAM draws less power per bit, but wrongly assumes fewer components per cell means fewer bits fit on the chip — it is actually the opposite: a smaller, simpler cell packs in more bits, not fewer.

Result: Dynamic RAM, compared with static RAM, has higher bit density and lower power consumption.