Instruction Formats and Expanding Opcode for GATE: Solved Encoding Numericals

Treat every instruction format as a bit budget. A four-level worked example shows exactly how unused opcode patterns expand into the next instruction class.

KnowledgeGate Team

Exam prep & CS education

Updated 15 Aug 20265 min read

Instruction-format questions are bit-budget accounting. A fixed instruction width is divided among an opcode and operand fields, and your job is to count the available patterns without losing a bit. Expanding opcode looks more complicated, but it is only a running tally of unused codes as the opcode grows.

Two rules carry every question of this kind. The opcode width is whatever the address fields leave over, and any opcode pattern left unused at one level becomes a whole family of longer patterns at the next.

The fixed instruction format

An instruction tells the processor which operation to perform and where its operands come from. Its opcode identifies the operation. The remaining fields can identify registers, memory addresses, immediate values, or addressing information.

Suppose an instruction is n bits wide, contains r equal address fields of m bits each, and uses the rest as an opcode. Then:

opcode bits k = n - r*m

A k-bit opcode has 2^k distinct bit patterns, so it can encode at most 2^k operations in that format.

For example, take a 32-bit instruction with a 6-bit opcode and two 5-bit register fields. The used bits are 6 + 2*5 = 16. The remaining field has 32 - 16 = 16 bits, perhaps for an immediate value. The 6-bit opcode permits up to 2^6 = 64 operation codes.

This is the same field-reading discipline used across Addressing Modes and Instruction Formats: name every field, write its width, and verify that the widths sum to the full instruction.

Why one fixed opcode can waste space

A machine may need three-address, two-address, one-address, and zero-address instructions. A three-address instruction spends many bits naming operands, so it has relatively few bits left for the opcode. A zero-address instruction names no operands, so almost its entire width can identify an operation.

If every class were forced to use one fixed opcode width, shorter instruction forms would leave useful bit positions unused. An expanding opcode lets the opcode become longer as the number of explicit address fields falls.

The design reserves one or more opcode patterns at a shorter level as escape codes. An escape pattern says that the opcode continues into what would have been the next address field. Instructions with more operands therefore receive shorter opcodes, while instructions with fewer operands can use longer ones.

The expanding-opcode tally

At each level, follow three steps:

  1. Calculate how many opcode patterns arrive at that level.

  2. Subtract the number assigned to instructions at that level.

  3. Multiply the unused count by 2^(width of the field absorbed next).

If one 4-bit opcode pattern is left unused, and the next level absorbs another 4-bit field, that one prefix grows into 1*2^4 = 16 longer opcode patterns. If two are left, they grow into 2*16 = 32 patterns.

The multiplication is not an extra formula to memorise. For every unused prefix, the four new bits can take all 16 values from 0000 through 1111. Refresh that binary counting idea in Number Systems and Base Conversions if 2^4 does not yet feel automatic.

Worked 16-bit expanding-opcode numerical

Consider a machine with 16-bit instructions. Every address field is 4 bits, so each such field can select one of 2^4 = 16 registers. The instruction set requires:

  • 15 three-address instructions

  • 14 two-address instructions

  • 31 one-address instructions

  • as many zero-address instructions as possible

Start with the form that has the most address fields.

Three-address level

Three addresses consume 3*4 = 12 bits. The opcode therefore has 16 - 12 = 4 bits, giving 2^4 = 16 patterns.

Use 15 patterns for the required three-address operations. The number left is 16 - 15 = 1.

Two-address level

The one unused 4-bit prefix absorbs the next 4-bit field. It expands into 1*2^4 = 16 eight-bit opcode patterns.

Use 14 for two-address operations. The number left is 16 - 14 = 2.

One-address level

Each of those two unused eight-bit prefixes absorbs another 4-bit field. The next level receives 2*2^4 = 32 twelve-bit opcode patterns.

Use 31 for one-address operations. The number left is 32 - 31 = 1.

Zero-address level

That one unused twelve-bit prefix absorbs the final 4-bit address field. It produces 1*2^4 = 16 full-width opcode patterns.

Therefore, the machine can encode 16 zero-address instructions.

Format

Opcode bits

Codes available

Codes used

Codes carried forward

Three-address

4

16

15

1

Two-address

8

1*16 = 16

14

2

One-address

12

2*16 = 32

31

1

Zero-address

16

1*16 = 16

up to 16

0 if all are used

Four-row 16-bit instruction layout, three-address to zero-address, with the opcode widening as each 4-bit address field is absorbed.

A useful cross-check is the opcode width at every row. Dropping one 4-bit address grows the opcode by 4 bits: 4, 8, 12, 16. Every row still totals 16 bits.

The feasibility check

The same tally tests whether a requested instruction mix is possible. If the requested count at any level exceeds the patterns available there, the mix cannot be encoded, even if a later class requests very few operations.

For instance, the worked machine has only 16 patterns available at the two-address level. A request for 17 two-address instructions fails immediately. You cannot borrow patterns from a later one-address level because those longer patterns exist only under prefixes left unused at the current level.

Always run two checks together:

  • Bit-width check: opcode bits + address bits = instruction width at every level.

  • Pattern-count check: requested codes <= available codes before carrying anything forward.

Traps in GATE questions

These numericals usually punish counting errors rather than difficult architecture.

  • Do not carry unused codes forward unchanged. Multiply them by 2^(absorbed field width).

  • Do not confuse codes used with codes left. Write the subtraction explicitly at every level.

  • Do not use the current opcode width as the multiplier. The multiplier comes from the width of the newly absorbed field.

  • Do not assume every opcode pattern is an independent instruction at all levels. A reserved short pattern is a prefix for a longer opcode.

Common stems ask how many zero-address instructions fit, whether a proposed mix is feasible, or how wide the opcode is for an r-address format. For year-specific paper details, confirm against the official GATE portal of the organising IIT. KnowledgeGate's question bank carries more than 1,700 Computer Organization and Architecture questions for repeated bit-budget and expanding-opcode practice.

Short version and next step

For a fixed format, use k + r*m = n, then count 2^k opcode patterns. For an expanding opcode, subtract the operations used at one level and multiply the unused patterns by the number of combinations in the field absorbed at the next level.

Rework the example after changing 14 two-address operations to 15. You should carry one code to the one-address level and discover that only 16 one-address patterns then exist, so the request for 31 fails. Once that tally is clean, practise timed encoding numericals in the GATE Test Series and use the wider GATE category to place them within Computer Organization.