In the logic circuit shown in the figure, Y is given by

GATE · 2018 · EE · Electrical Engineering

In the logic circuit shown in the figure, Y is given by

Two NAND gates take input pairs A,B and C,D; their outputs feed a third NAND gate whose output is Y.
  1. A.

    Y = ABCD

  2. B.

    Y = (A+B)(C+D)

  3. C.

    Y = A+B+C+D

  4. D.

    Y = AB+CD

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