Course module
Digital Logic — SSC JE 2026 – IMD Scientific Assistant – Computer Science (Paper 1 + Paper 2)
Explore the module outline and lessons below. Enroll free to begin studying here.
Return to /learn/SSC-JE-IMD-SCIENTIFIC-ASSISTANT-COMPUTER-SCIENCE/part-d-cs-it after enrolling
- Lessons
- 183
- Duration
- 15 hr 56 min
- PYQs
- 32
- Practice
- 1249
9% of this course's PYQ weight is covered in this module.
Syllabus index
Lessons in this module
Digital Systems & Boolean Basics
Digital Fundamentals & Boolean Algebra
Logic Gates & Hardware
Evolution, NOT, OR & AND Gates
Universal Gates: NAND & NOR
Boolean Expression
SOP & POS Canonical Forms
Boolean Function Counts
Functional Completeness
Boolean Minimization
K-Map Structure & PIs
- K-Map Structure & PIsPdf
- Basics of SimplificationDrm Video
- Understanding K MAP part 1Drm Video
- Understanding K MAP part 2Drm Video
- Understanding K MAP part 3Drm Video
- POS K MapDrm Video
- What is minimal Boolean expressionDrm Video
- Rules of groupingDrm Video
- Don't care conditionDrm Video
- Practice on K MapDrm Video
- More than one solutionDrm Video
- Prime ImplicantDrm Video
- Practice QuestionDrm Video
- Practice QuestionsDrm Video
- Practice QuestionDrm Video
- Solving K Map in reverse fashionDrm Video
- Practice QuestionDrm Video
Function Equivalence
Logic Circuit Analysis
Adv. Laws & Optimization
Combinational Circuit
Adders & Subtractors
- Adders & SubtractorsPdf
- Basics of combinational circuitDrm Video
- Fundamental of AddersDrm Video
- Half AdderDrm Video
- Full AdderDrm Video
- Implementing Full Adder Using Half AdderDrm Video
- Half SubtractorDrm Video
- Full SubtractorDrm Video
- Four-bit Parallel-Ripple Adder-SubractorDrm Video
- Four-bit Parallel Adder Ripple AdderDrm Video
CLA & Arithmetic Logic
Multiplexers (MUX)
DeMux, Decoder & Encoder
- DeMux , Decoder & EncoderPdf
- Basics of DeMultiplexerDrm Video
- Implementing 1x2 DeMultiplexerDrm Video
- Implementing 1x4 DeMultiplexerDrm Video
- DEMux_practice_questionDrm Video
- Basics of DecoderDrm Video
- Implementing 1x2 DecoderDrm Video
- Implementing 2x4 DecoderDrm Video
- Understanding Decoder ApplicationDrm Video
- Decoder ExpansionDrm Video
- DecodersDrm Video
- Decoder_Practice_QuestionDrm Video
- DecoderDrm Video
- Understanding EncoderDrm Video
- Implementing 2x1 EncoderDrm Video
- Priority EncoderDrm Video
Sequential Circuits
Seq. Logic & Latches
Flip-Flops & Conversion
Sync Counter Analysis
Sync Counter Design
Ripple (Async) Counters
- Ripple (Async Counters)Pdf
- Ripple and Asynchronious CounterDrm Video
- Ripple and Asynchronous Counter FurtherDrm Video
- Ripple and Asynchronous Counter Using ClockDrm Video
- Synchronous Vs Asynchronous CounterDrm Video
- Self-Staring And Free-Running CounterDrm Video
- Restricted Mode CounterDrm Video
- Restricted Mode Counter furtherDrm Video
Shift Registers
Ring & Johnson Counters
Number System
Basics & Decimal Convert
General Base Conversion
Binary, Octal & Hex
Number Representation
Basics to 1s Complement
2s Complement & Math
Floating Point Rep
Floating Point Basics
IEEE 754 Standards
Booth’s Algorithm
Previous-year questions
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Explore the course
- General Intelligence & Reasoning
- General Awareness
- Engineering Mathematics
- Computer Organisation & Architecture
- Programming & Data Structures
- Databases
- Algorithms
- Theory of Computation
- Compiler Design
- Operating System
- Computer Networks
- Full Length Mock Tests
- Sectional Tests