Understanding Counting of a Flip Flop Part-2

Duration: 4 min

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Module outline

  1. About the Course: About the Course
  2. Section 1 | Language (Hindi): भाषा, लिपि, ध्वनि, वर्ण, अक्षर, स्वर, व्यंजन, मात्रा और संयुक्ताक्षर, वर्तनी, वर्ण-विन्यास, अनुस्वार, अनुनासिक, चंद्रबिंदु और ‘र’ के रूप, शब्द, पद और शब्द-भेद, संज्ञा और सर्वनाम, विशेषण और क्रिया, लिंग, वचन, पुरुष और कारक, काल, वाच्य, वाक्य और वाक्य-भेद, संधि, समास, विलोम शब्द, पर्यायवाची शब्द, सामान्य अशुद्धियाँ, अनेक शब्दों के लिए एक शब्द, मुहावरे और लोकोक्तियाँ, अपठित गद्यांश और अपठित पद्यांश, Multi-Topic Content (Cross-Concept Material), वर्णमाला
  3. Section 1 | Language (उर्दू भाषा — 22 प्रश्न (निश्चित)): Spelling & Diacritics, Grammar (اسم, فعل, صفت, ضمیر), Vocabulary, Idioms & Proverbs, Comprehension
  4. Section 1 | Language (বাংলা / बांग्ला भाषा — 22 प्रश्न (निश्चित)): Bangla Script and Sounds, Bangla Grammar and Usage, Bangla Word Formation and Vocabulary, Reading and Text Interpretation
  5. Section 1 | Language (English): Vocabulary, Noun, Subject Verb Agreement (Verb Noun Agreement), Adjectives, Tenses, Pronoun, Verb, Adverb, Preposition, Articles, Determiner, Conjunction, Modals, Active Passive Voice (Voice), Direct and Indirect Speech, Sentence Correction (Error Correction), Sentence Completion (Fill in the blanks), Sentence Construction, Sentence Re-arrangements (Para Jumbles) (Narrative Sequencing), Comprehension / Reading Comprehension / Unseen Passages (Critical Reasoning) (Paragraph Questions), Cloze Test (Cloze Passage), Verbal Analogy (Word Based Analogy), Facts, Inference and Judgements
  6. Section 2 | Primary Maths & Reasoning: Ratio and Proportion (Ratios), Divisibility Rules, Mixture and Alligation, Permutation and Combination, Number System, HCF LCM, Sequence and Series (Series), Speed Time and Distance, Series (Number and Letter Series) (Numerical Relations and Reasoning), Coding Decoding, Non Verbal Reasoning (Spatial Aptitude) (Spatial Reasoning) (Visual Reasoning), Percentage, Average, Profit and Loss, Simple Interest and Compound Interest, Time and Work, Mensuration and Geometry, Age Problems, Arithmetic, Powers and Exponents (Surds and Indices), Algebra, Probability, Trigonometry, Syllogisms, Seating Arrangements, Blood Relations, Directions (Direction Test), Analytical Reasoning (Counting Figures Reasoning), Puzzle Solving (Puzzles), Calendar, Clock, Cubes & Dices, Venn Diagram, Data Arrangement, Inequality, Analogy, Ranking, Order and Sequence
  7. Section 2 | General Awareness (GK + Current Affairs): Polity, Physics, Biology, State Wise GK, Chemistry, History, Geography, Indian Economy, Environment, GK- Current Affairs, Static General Knowledge
  8. Section 3 | Computer System and Org. (CSO): Basics of COA, Floating Point Rep, Cache Memory Organization, Instr Formats & Modes, Programming the Basic Computer, Input Output Organisation, Register Transfer and Microoperations, Control Unit Design
  9. Section 3 | Database Management System: Basics of DBMS, ER Diagram, Relational Model & Functional Dependencies, Keys & Integrity Constraints, Normalization (1NF - BCNF), Decomposition Properties & 4NF, SQL, File Organization & Indexing, Relational Algebra, Relational Calculus, Transaction Management, Concurrency Control
  10. Section 3 | Operating System: Introduction to OS, Process Management, CPU Scheduling, Threads & Process Creation, Memory Management, Virtual Memory, Disc Scheduling, File Management, Process Synchronization
  11. Section 3 | Computer Networks: Introduction to CN, Data Communication, DLL: Access Control, DLL: Flow Control, DLL: Error Control, Data Link Layer - Ethernet, Net Layer: IPv4 & Proto, Net Layer: IP Addressing, Transport Layer Services, TL: Congestion & UDP, Application Layer, Hardware basics
  12. Section 3 | Data Structures: Introduction to DS, Array, Stack, Queue, Linked List, Tree, Graphs, Hashing, Algorithm Analysis, Time Complexity Analysis, Sorting Algorithms, Greedy Algorithms, Minimum Spanning Trees, Shortest Path Algos
  13. Section 3 | Theory Of Computation & Compiler Design: Introduction to TOC, Deterministic FA (DFA), Non-Deterministic FA, Regular Expressions, Grammar, Regular Language Properties, Moore & Mealy Machines, Pushdown Automata & CFG, Turing Machines, Intro to Compilers, Lexical Analysis, Grammar & CFG, Syntax Analysis: Top-Down, Syntax Analysis: Bottom-Up, Semantic Analysis & SDT, Intermediate Code Gen, Code Optimization
  14. Section 3 | Emerging Trends (AI, Societal Ethics & MS Office): Artificial Intelligence, Emerging Tech Trends, Society, Law & Ethics, MS Office Applications
  15. Section 3 | Software Engineering: Fundamentals of Software Engineering, Software Requirements and Quality Assurance, Software Design, Estimation and Metrics, Software Maintenance and Configuration Management, Software Testing
  16. Section 3 | C Programming: C Fundamentals, Control Flow, Functions, Arrays & Pointers, Storage Classes, Structures & Enums, DMA, Macros, Scoping & File Handling
  17. Section 3 | OOPS, C++, JAVA, HTML: OOPS with C++, Java, HTML Basics, CSS
  18. Section 3 | Java: Java Fundamentals, Array, String, IO & References
  19. Section 3 | Python: Introduction to Python, Tokens, Variables, Data Types, I/O, Operators & Expressions, Control Flow & Looping, Collections & Strings, Functions & Modules, File Handling & Data Analysis
  20. Section 3 | Digital Electronics: Digital Systems & Boolean Basics, Logic Gates & Hardware, Boolean Expression, Boolean Minimization, Combinational Circuit, Sequential Circuits, Number System, Number Representation
  21. Section 3 | Multimedia: Multimedia
  22. BPSC Previous Year Papers:
  23. BPSC Full Mock Tests:
AI summary & chapters

AI Summary

An AI-generated summary of this video lecture.

This educational video provides a step-by-step tutorial on designing a synchronous counter using T flip-flops for a specific counting sequence: 0 to 1 to 2 to 3 and back to 0. The instructor begins by establishing the state table, mapping present states to next states. He then utilizes the excitation table for T flip-flops to determine the necessary input conditions ($T_1$ and $T_0$) for each state transition. The lesson concludes with the simplification of these input conditions using Karnaugh maps (K-maps) to derive the final Boolean expressions and the corresponding logic circuit diagram.

Chapters

  1. 0:00 – 2:00 00:00-02:00

    The instructor introduces the problem statement displayed on the screen: 'Design a synchronous counter for sequence: 0 -> 1 -> 2 -> 3 -> 0, using T flip flop.' He sets up a state table with columns for Present State ($Q_{1p}, Q_{0p}$) and Next State ($Q_{1N}, Q_{0N}$). He systematically fills the table based on the binary sequence: 00 transitions to 01, 01 transitions to 10, 10 transitions to 11, and 11 transitions back to 00. He then draws two T flip-flops on the whiteboard, labeling them $T_1$ and $T_0$, and begins explaining the excitation requirements. He notes that for a T flip-flop, if the present state equals the next state, the input T is 0; if they differ, T is 1. He starts populating the excitation columns $T_1$ and $T_0$ based on these rules for each row of the state table.

  2. 2:00 – 4:23 02:00-04:23

    The instructor proceeds to simplify the logic for the T inputs using Karnaugh maps. He draws two separate 2-variable K-maps for $T_1$ and $T_0$. For $T_1$, he fills the map cells with the values derived from the excitation table: 0 for state 00, 1 for state 01, 0 for state 10, and 1 for state 11. He groups the 1s to derive the simplified expression $T_1 = Q_{0p}$. For $T_0$, he fills the map with 1s in all four cells because the least significant bit toggles in every step of the sequence. This leads to the constant expression $T_0 = 1$. Finally, he sketches the final circuit diagram, connecting the $T_0$ input to a logic high (SV) and connecting the $T_1$ input to the output $Q_0$ of the first flip-flop, completing the design.

The video effectively guides students through the complete design process of a synchronous counter. It starts with the fundamental step of defining the state transitions in a table, which is crucial for understanding the counter's behavior. The instructor then bridges the gap between state transitions and hardware requirements by applying the T flip-flop excitation table. This logical deduction is essential for determining the combinational logic needed. The use of K-maps demonstrates the standard method for minimizing logic expressions, ensuring an efficient circuit design. The final circuit diagram ties all theoretical steps together, showing how the simplified Boolean expressions translate into physical connections between flip-flops. This progression from abstract sequence to concrete circuit is a standard and vital workflow in digital logic design.

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