8085 ISA & AM

Duration: 6 min

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Inside: a video lesson and guided study material.

Module outline

  1. About Course: UPPSC Course Overview
  2. Interview Preparation & Guidance: Interview Preparation
  3. Paper 1 | General Hindi: भाषा, लिपि, ध्वनि, वर्ण, अक्षर, स्वर, व्यंजन, मात्रा और संयुक्ताक्षर, वर्तनी, वर्ण-विन्यास, अनुस्वार, अनुनासिक, चंद्रबिंदु और ‘र’ के रूप, शब्द, पद और शब्द-भेद, संज्ञा और सर्वनाम, विशेषण और क्रिया, लिंग, वचन, पुरुष और कारक, काल, वाच्य, वाक्य और वाक्य-भेद, वर्णमाला, समास, संधि, विलोम शब्द, पर्यायवाची शब्द, सामान्य अशुद्धियाँ, अनेक शब्दों के लिए एक शब्द, मुहावरे और लोकोक्तियाँ, अपठित गद्यांश और अपठित पद्यांश, Multi-Topic Content (Cross-Concept Material)
  4. Paper 2 | General Studies: State Wise GK, Polity, Geography, History, GK- Current Affairs
  5. Paper 1 | Programming Language: Language Design, C Fundamentals, Control Flow, Functions, Arrays & Pointers, Storage Classes, Structures & Enums, DMA, Macros, Scoping & File Handling, OOPS with C++
  6. Paper 1 | Database Management Systems: Basics of DBMS, ER Diagram, Relational Model & Functional Dependencies, Keys & Integrity Constraints, Normalization (1NF - BCNF), Decomposition Properties & 4NF, File Organization & Indexing, Relational Algebra, SQL, Relational Calculus, Transaction Management, Concurrency Control, ORDBMS, NoSQL
  7. Paper 1 | Cyber Security: Society, Law & Ethics, Cyber Threats and Malware Attacks, Role of Internet and Web Services, Security in Mobile and Wireless Computing, Electronic Data Interchange and E-Commerce, Physical Security and Cryptography Basics, Intrusion Detection Systems (IDS), Cyber Safety and Security, Ethical Hacking
  8. Paper 1 | Computer Organization and Architecture: Basics of COA, Programming the Basic Computer, Cache Memory Organization, Input Output Organisation, Instr Formats & Modes, Register Transfer and Microoperations, Control Unit Design
  9. Paper 1 | Computer Networks: Introduction to CN, Data Communication, DLL: Access Control, DLL: Flow Control, DLL: Error Control, DLL: Framing, Data Link Layer - Ethernet, Net Layer: IPv4 & Proto, Net Layer: IP Addressing, Net Layer:Routing Protocol, Transport Layer Services, TL: Congestion & UDP, Application Layer, Hardware basics, Network Security
  10. Paper 1 | Design and Analysis of Algorithms: Algorithm Analysis, Time Complexity Analysis, Sorting Algorithms, Greedy Algorithms, Dynamic Programming, Minimum Spanning Trees, Shortest Path Algos, Advanced Algorithms
  11. Paper 1 | Data Structures: Introduction to DS, Array, Linked List, Stack, Queue, Tree, Graphs, Hashing
  12. Paper 1 | Discrete Structures and Theory of Logic: Permutation and Combination, Set Theory, Relations, Functions, Propositional and Predicate Logic, Graph Theory, Group Theory
  13. Paper 1 | Software Project Management: Software Project Management
  14. Paper 2 | Operating Systems: Introduction to OS, Process Management, CPU Scheduling, Process Synchronization, Threads & Process Creation, Deadlock, Memory Management, Virtual Memory, Disc Scheduling, File Management, Unix OS, Linux OS, Security
  15. Paper 2 | Compiler Design: Intro to Compilers, Lexical Analysis, Grammar & CFG, Syntax Analysis: Top-Down, Syntax Analysis: Bottom-Up, Semantic Analysis & SDT, Intermediate Code Gen, Code Optimization, Run Time Environment, Introduction to TOC, Deterministic FA (DFA), Non-Deterministic FA, Regular Expressions, Pushdown Automata & CFG, Complexity Theory
  16. Paper 2 | Artificial Intelligence & High Performance Computing: Approaches to AI, Search Algorithms, Game Playing, Knowledge Representation, Planning, Multi Agent Systems, Natural Language Processing, Emerging Tech Trends
  17. Paper 2 | Image Processing: Digital Image Fundamentals, Image Enhancement, Image Restoration, Color Image Processing, Image Compression
  18. Paper 2 | Software Engineering: Fundamentals of Software Engineering, Software Requirements and Quality Assurance, Software Design, Estimation and Metrics, Software Testing, Software Maintenance and Configuration Management
  19. Paper 2 | Computer Graphics: Basics of Computer Graphics, 2-D Geometrical Transforms and Viewing, 3-D Object Representation, Geometric Transformations and Viewing
  20. Paper 2 | Web Technologies: Website, Browser & Services, Internet Fundamentals, Web Design & Development, Protocols & Services, Web Publishing & Hosting, Server Side & Security, Emerging Technologies, HTML Basics, JavaScript-Basics, Java
  21. Paper 2 | Soft Computing: Fuzzy Sets, Artificial Neural Networks, Genetic Algorithms
  22. Paper 2 | Distributed System: Distributed Systems
  23. UPPSC Live Class Recordings: UPPSC Polytechnic Lecturer 2025 (CS)
  24. Previous Year Papers:
  25. Mock Test:
AI summary & chapters

AI Summary

An AI-generated summary of this video lecture.

The video provides a comprehensive overview of the 8085 microprocessor's architecture, focusing on its instruction set, interrupt handling, and addressing modes. The instructor breaks down the five instruction categories, detailing examples like MOV and ADD. He explains the interrupt hierarchy, distinguishing between maskable and non-maskable types. Finally, he delves into addressing modes, using diagrams to clarify data location. This structured approach helps students understand fundamental 8085 operations and prepares them for programming tasks. The lecture is visually supported by a slide listing all key concepts, ensuring clarity.

Chapters

  1. 0:00 – 2:00 00:00-02:00

    The instructor introduces the "Instruction Set of 8085" on the slide. He lists five categories: Data Transfer, Arithmetic, Logical, Branching, and Machine Control Instructions. He underlines each category. For Data Transfer, he writes "Rg" (Register) and "Mem" (Memory) to illustrate movement. He mentions opcodes like MOV, MVI, LXI for transfer, and ADD, SUB, INR, DCR for arithmetic. He underlines Logical Instructions like ANA, ORA, CMA and Branching Instructions like JMP, CALL, RET. He concludes with Machine Control Instructions such as HLT and NOP. This section provides a high-level taxonomy of 8085 operations.

  2. 2:00 – 5:00 02:00-05:00

    The lecture transitions to "Interrupts in 8085". The instructor explains interrupts allow the CPU to respond to external events. He lists TRAP as the highest priority, non-maskable interrupt. He discusses RST 7.5, 6.5, and 5.5 as maskable interrupts and INTR as a general request. He begins the "Addressing Modes" section. He defines Immediate Addressing where data is given directly in the instruction and Register Addressing where data is in a register. He underlines "Data is given directly in instruction" and "Data is in register" to emphasize the distinction. This section sets the stage for understanding how instructions interact with memory.

  3. 5:00 – 5:55 05:00-05:55

    The instructor continues with Addressing Modes: Direct, Indirect, and Implied. For Direct Addressing, the address is specified in the instruction. For Indirect Addressing, he draws a diagram showing a register pair holding an address pointing to data in memory. He labels this "pointer" and writes "1000" in a box. He explains that the register pair acts as a pointer to the actual data location. Finally, he explains Implied Addressing where the operand is implied by the instruction, such as CMA. He underlines "Address stored in register pair" and "Operand is implied". This section clarifies how the CPU fetches operands from different sources.

The video structures 8085 concepts from instruction categories to data access methods. By categorizing instructions into groups like arithmetic and branching, the instructor establishes CPU capabilities. The interrupt discussion highlights handling asynchronous events. The addressing modes section bridges abstract instructions and physical memory, using visual aids to distinguish direct access from indirect pointer-based access. This progression from instruction types to execution control to data location provides a complete foundational understanding. The instructor's use of underlining and handwritten notes reinforces key terms like "non-maskable" and "pointer". The visual diagrams for indirect addressing are particularly helpful for understanding how memory pointers work in assembly language programming.

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