Full Subtractor
Duration: 33 min
This video lesson is available to enrolled students.
Inside: a video lesson and guided study material.
Module outline
- About Course: About the Course
- CS | 01 | Digital Logic and Circuits and Discrete Mathematical Structures: Digital Systems & Boolean Basics, Number System, Number Representation, Logic Gates & Hardware, Boolean Expression, Boolean Minimization, Combinational Circuit, Sequential Circuits, Set Theory, Relations, Functions, Graph Theory, Group Theory, Propositional and Predicate Logic, Permutation and Combination
- CS | 02 | Computer Organization and Architecture: Basics of COA, Cache Memory Organization, Input Output Organisation, Pipelining, Instr Formats & Modes, Control Unit Design, Multiprocessors
- CS | 03 | Data Structures and Algorithm: Introduction to DS, Array, Stack, Queue, Linked List, Tree, Graphs, Hashing, Algorithm Analysis, Time Complexity Analysis, Sorting Algorithms, Greedy Algorithms, Dynamic Programming, Minimum Spanning Trees, Shortest Path Algos, Complexity Theory, Advanced Algorithms
- CS | 04 | Problem Solving through C Programming: C Fundamentals, Control Flow, Functions, Arrays & Pointers, Storage Classes, Structures & Enums, DMA, Macros, Scoping & File Handling
- CS | 05 | Object Oriented Techniques: Object Oriented Technology, Java
- CS | 06 | Operating System: Introduction to OS, Process Management, CPU Scheduling, Process Synchronization, Threads & Process Creation, Deadlock, Memory Management, Virtual Memory, Disc Scheduling, File Management, Windows OS, Unix OS
- CS | 07 | Database Management Systems: Basics of DBMS, ER Diagram, Relational Model & Functional Dependencies, Keys & Integrity Constraints, Normalization (1NF - BCNF), Decomposition Properties & 4NF, Relational Algebra, SQL, Relational Calculus, Transaction Management, Concurrency Control, Database Recovery, Database Security & Authorization, Query Processing & Optimization, File Organization & Indexing
- CS | 08 | Computer Networks: Introduction to CN, Data Communication, DLL: Access Control, DLL: Flow Control, DLL: Error Control, DLL: Framing, Data Link Layer - Ethernet, Net Layer: IPv4 & Proto, Net Layer: IP Addressing, Net Layer:Routing Protocol, Transport Layer Services, TL: Congestion & UDP, Application Layer, Hardware basics
- CS | 09 | Software Engineering: Fundamentals of Software Engineering, Software Requirements and Quality Assurance, Software Design, Estimation and Metrics, Software Testing, Software Maintenance and Configuration Management
- CS | 10 | Internet Technology, Web Design and Web Technology: Internet Fundamentals, Web Design & Development, Protocols & Services, Web Publishing & Hosting, Server Side & Security, Emerging Technologies, JavaScript-Basics, HTML Basics
- CS | 11 | System Analysis And Design: Fundamentals of Systems and Information Systems, SDLC and Development Approaches, Software Documentation and Software Requirements Specification (SRS), SDD and Quality Assurance, Security, Risk Management & Maintenance
- CS | 12 | Information Security and Cyber Laws: Cyber Threats and Malware Attacks, Role of Internet and Web Services, Security in Mobile and Wireless Computing, Electronic Data Interchange and E-Commerce, Physical Security and Cryptography Basics, Intrusion Detection Systems (IDS), Cyber Safety and Security
- CS | 13 | Computer Graphics: Basics of Computer Graphics, 2-D Geometrical Transforms and Viewing, 3-D Object Representation, Geometric Transformations and Viewing
- GS Paper | 01 | Indian and World Geography: Geography
- GS Paper | 02 | History: History
- GS Paper | 03 | Indian Economy & Social Development: Indian Economy
- GS Paper | 04 | General Science: Biology, Chemistry, Physics
- GS Paper | 05 | Elementary Maths: Number System, Divisibility Rules, HCF LCM, Percentage, Profit and Loss, Simple Interest and Compound Interest, Ratio and Proportion (Ratios), Average, Time and Work, Speed Time and Distance, Algebra, Mensuration and Geometry, Data Interpretation, Arithmetic, Statistics, Probability, Sequence and Series (Series), Mixture and Alligation, Calculus, Trigonometry, Vectors
- GS Paper | 06 | Indian Polity and Governance: Polity
- GS Paper | 07 | Current Events: GK- Current Affairs
- UPLT Live Classes Notes: UPLT Live Classes
- UPLT Full Mock Tests Tier 1:
- UPLT Full Mock Tests Tier 2:
AI summary & chapters
AI Summary
An AI-generated summary of this video lecture.
This lecture introduces the full subtractor as a combinational logic circuit that performs arithmetic subtraction of three input bits: A (minuend), B (subtrahend), and B_{n-1} (borrow-in from the previous lower-significant position). The instructor begins with a slide definition and then uses a 4-bit binary example, A = 0110 and B = 1001, to motivate the need for borrow propagation. He labels MSB and LSB positions, highlights the least significant bit where a borrow is required (e.g., 10 - 1 = 1), and shows how subtraction proceeds bit by bit. A block diagram is drawn with inputs A, B, Bin and outputs D (difference) and Bout (borrow-out). The lecture then extends this to a multi-bit subtractor by cascading four full-subtractor stages labeled 0 through 3, with A = A3 A2 A1 A0 and B = B3 B2 B1 B0, showing how the borrow output of one stage feeds the borrow input of the next. A truth table is constructed with inputs A, B, Bin and outputs D, B (borrow), filled row by row using binary subtraction rules. From the truth table, minterm sums are written: D(A,B,Bin) = Σm(1,6,4,7) and B(A,B,Bin) = Σm(1,4,3,7). Finally, Boolean algebra simplification yields the standard full-subtractor equations: D = A ⊕ B ⊕ Bin and Bout = ĀB + (A ⊕ B)Bin. A final logic-gate diagram is drawn using XOR and OR gates to implement these expressions, completing the design of the full subtractor.
Chapters
0:00 – 2:00 00:00-02:00
The lecture opens with a slide titled 'Full Subtractor' stating that it 'performs the arithmetic subtraction of three input bits.' The inputs are listed as A (Minuend) and B (Subtrahend), with a note that B_{n-1} represents the borrow from the previous lower-significant position. The instructor turns to the whiteboard and writes '(A - B)' followed by 'A = 0110' over 'B = 1001', setting up a concrete binary subtraction example to motivate the circuit design.
2:00 – 5:00 02:00-05:00
The instructor explains the roles of minuend A, subtrahend B, and borrow-in Bin. He labels MSB and LSB on the board and walks through the subtraction example bit by bit, focusing on the least significant column where a borrow is needed. He writes '10 - 1 = 1' to demonstrate the borrow scenario and begins laying out a column subtraction with A and B rows under bit positions 3, 2, 1, 0.
5:00 – 10:00 05:00-10:00
The instructor draws a green block diagram labeled 'Full Subtractor' with input arrows A, B, Bin and output arrows D and Bout, captioned 'Block Diagram.' He then extends this to a multi-bit representation, writing MSB: A3 A2 A1 A0 and LSB: B3 B2 B1 B0, and shows how the borrow input propagates through each bit position. He writes subtraction equations for individual bits, such as A0 - B0 = D0 and A1 - B1 - Bin1.
10:00 – 15:00 10:00-15:00
The instructor builds a cascaded multi-bit subtractor by drawing red full-subtractor boxes. He starts with one box for bit 0 (inputs A0, B0, Bin0; output D0) and then adds a second box for bit 1 (inputs A1, B1, Bin1), showing how the borrow-out of one stage connects to the borrow-in of the next. The board also retains the '10 - 1 = 1' example and MSB/LSB labels as reference.
15:00 – 20:00 15:00-20:00
The instructor completes the four-stage cascade, labeling boxes 'Full Subtractor (3)', '(2)', '(1)', and '0', with A = A3 A2 A1 A0 and B = B3 B2 B1 B0. He then transitions to logic design by drawing a green truth-table grid with column headers 'Inputs' (A, B, Bin) and 'Outputs' (D, B), beginning to fill in rows with 0s and dashes as he evaluates each combination.
20:00 – 25:00 20:00-25:00
The instructor fills in the full truth table for the full subtractor, using binary subtraction rules such as '1 - 1 = 0' and lines beginning with '10 - 1' to determine output values for each input combination. Below the table, he writes minterm sums in pink: 'D(A,B,Bin) = Σm(1,6,4,7)' and 'B(A,B,Bin) = Σm(1,4,3,7)', identifying which input combinations produce a difference of 1 and a borrow-out of 1 respectively.
25:00 – 30:00 25:00-30:00
The instructor applies Boolean algebra to simplify the minterm expressions. He shows steps for the borrow output, writing '= Bin(ĀA + AĀ) + ĀB' and then simplifying to '= ĀB + (A ⊕ B)Bin'. He also derives the difference output as 'D = A ⊕ B ⊕ Bin', using XOR identities to reduce the expressions to their minimal forms.
30:00 – 32:35 30:00-32:35
The instructor draws the final logic-gate implementation of the full subtractor. He uses XOR gates to compute A ⊕ B and then (A ⊕ B) ⊕ Bin for the difference output D, and combines an AND gate with ĀB and (A ⊕ B)Bin fed into an OR gate for the borrow output Bout. The completed circuit diagram shows inputs A, B, Bin leading to outputs D and Bout, concluding the design.
The lecture follows a structured progression from motivation to implementation. It begins with the definition of a full subtractor and a concrete 4-bit binary example (A = 0110, B = 1001) to illustrate why borrow propagation is necessary. The instructor then abstracts this into a single-bit block diagram with inputs A, B, Bin and outputs D, Bout, before extending to a four-stage cascaded architecture for multi-bit subtraction. The core of the lecture is the truth-table construction, where all eight input combinations are evaluated using binary subtraction rules. From this table, minterm sums are extracted for both outputs: D = Σm(1,6,4,7) and Bout = Σm(1,4,3,7). Boolean algebra simplification then yields the canonical full-subtractor equations: D = A ⊕ B ⊕ Bin and Bout = ĀB + (A ⊕ B)Bin. The final gate-level diagram uses two XOR gates, one AND gate, and one OR gate to implement these expressions. Key takeaways for exam revision: (1) A full subtractor has three inputs and two outputs; (2) the difference output is a triple XOR of A, B, and Bin; (3) the borrow-out depends on both ĀB and the XOR of A and B multiplied by Bin; (4) multi-bit subtraction is achieved by cascading full subtractors with borrow chaining.