3 Address

Duration: 3 min

This video lesson is available to enrolled students.

Return to /learn/TPSC-ASSISTANT-TECHNICAL-OFFICER/computer-organization-and-architecture/instr-formats-modes/instruction-structure/asset-3-address after enrolling

Inside: a video lesson and guided study material.

Module outline

  1. About Course: About the Course
  2. Paper 2 | Digital Logic: Digital Systems & Boolean Basics, Logic Gates & Hardware, Boolean Expression, Boolean Minimization, Combinational Circuit, Sequential Circuits, Number System, Number Representation, Floating Point Rep
  3. Paper 2 | Computer Organization And Architecture: Basics of COA, Cache Memory Organization, Input Output Organisation, Pipelining, Control Unit Design, Instr Formats & Modes, Programming the Basic Computer
  4. Paper 2 | Analog And Digital Communication: Introduction to Communication Systems & Random Signals, Analog Communication Systems, Information Theory & Digital Communication Fundamentals, Digital Modulation & Detection Techniques, Error Control, Synchronization & Multiple Access Techniques
  5. Paper 2 | Programming in C: C Fundamentals, Control Flow, Functions, Arrays & Pointers, Storage Classes, Structures & Enums, DMA, Macros, Scoping & File Handling
  6. Paper 2 | Data Structures And Programming: Introduction to DS, Array, Stack, Queue, Linked List, Tree, Graphs, Hashing, Java, OOPS with C++, Java Fundamentals, Array, String, IO & References
  7. Paper 2 | Algorithms: Algorithm Analysis, Sorting Algorithms, Time Complexity Analysis, Greedy Algorithms, Dynamic Programming, Minimum Spanning Trees, Shortest Path Algos
  8. Paper 2 | Compiler Design: Intro to Compilers, Lexical Analysis, Grammar & CFG, Syntax Analysis: Top-Down, Syntax Analysis: Bottom-Up, Semantic Analysis & SDT, Intermediate Code Gen, Code Optimization, Run Time Environment
  9. Paper 2 | Operating System: Introduction to OS, Process Management, CPU Scheduling, Process Synchronization, Threads & Process Creation, Deadlock, Memory Management, Virtual Memory, Disc Scheduling, File Management, Unix OS, Linux OS
  10. Paper 2 | Databases: Basics of DBMS, ER Diagram, Relational Model & Functional Dependencies, Keys & Integrity Constraints, Normalization (1NF - BCNF), Decomposition Properties & 4NF, Relational Algebra, SQL, Relational Calculus, File Organization & Indexing, Transaction Management, Concurrency Control
  11. Paper 2 | Information Systems and Software Engineering: Fundamentals of Software Engineering, Software Requirements and Quality Assurance, Software Design, Estimation and Metrics, Software Testing, Software Maintenance and Configuration Management
  12. Paper 2 | Computer Networks: Introduction to CN, Data Communication, DLL: Access Control, DLL: Flow Control, DLL: Error Control, DLL: Framing, Data Link Layer - Ethernet, Net Layer: IPv4 & Proto, Net Layer: IP Addressing, Net Layer:Routing Protocol, Transport Layer Services, TL: Congestion & UDP, Application Layer, Hardware Basics
  13. Paper 2 | Internet & Web Technologies: Website, Browser & Services, Internet Fundamentals, Web Design & Development, Protocols & Services, Web Publishing & Hosting, Server Side & Security, Emerging Technologies, HTML Basics, JavaScript-Basics, CSS, XML, HTML5
  14. Paper 2 | Cyber Security And Emerging Technologies: Emerging Tech Trends
  15. Paper 2 | Cloud Technology: Cloud Computing
  16. Paper 2 | Probability and statistics: Probability, Statistics
  17. Paper-1 English: Vocabulary, Preposition, Articles, Comprehension / Reading Comprehension / Unseen Passages (Critical Reasoning) (Paragraph Questions), Sentence Re-arrangements (Para Jumbles) (Narrative Sequencing), Sentence Correction (Error Correction), Sentence Completion (Fill in the blanks), Cloze Test (Cloze Passage), Sentence Construction
  18. Paper 1 General Mental Ability & Logical reasoning: Ratio and Proportion (Ratios), Divisibility Rules, Data Interpretation, Mixture and Alligation, Permutation and Combination, Logarithm, Number System, HCF LCM, Sequence and Series (Series), Speed Time and Distance, Series (Number and Letter Series) (Numerical Relations and Reasoning), Coding Decoding, Data Sufficiency, Non Verbal Reasoning (Spatial Aptitude) (Spatial Reasoning) (Visual Reasoning), Percentage, Average, Powers and Exponents (Surds and Indices), Algebra, Profit and Loss, Simple Interest and Compound Interest, Time and Work, Pipe and Cistern, Mensuration and Geometry, Mental Ability, Age Problems, Partnership, Arithmetic, Speed Mathematics and Basic Mathematics, Syllogisms, Deductive and Inductive Reasoning (Logical Deduction and Induction) (Prepositional Reasoning), Seating Arrangements, Blood Relations, Directions (Direction Test), Analytical Reasoning (Counting Figures Reasoning), Puzzle Solving (Puzzles), Calendar, Clock, Cubes & Dices, Selection Decision Table (Decision Making), Logical Sequence Of Words, Venn Diagram, Analogy
  19. Paper-1 General Knowledge & Current Affairs: State Wise GK, History, Geography, GK- Current Affairs, Static General Knowledge
  20. Full Length Mock Test:
AI summary & chapters

AI Summary

An AI-generated summary of this video lecture.

This educational video provides a detailed lecture on 3-address instructions within computer architecture. The instructor defines the instruction format, consisting of an Opcode, two operands (Oprend1, Oprend2), and a Destination field. He explains that the Program Counter handles sequencing, removing the need for an address field in the instruction itself. The lecture uses the expression X = (A + B) * (C + D) to demonstrate translation into assembly language. Finally, he evaluates pros and cons, noting popularity due to binary nature but highlighting increased instruction length and space consumption compared to fewer-address formats.

Chapters

  1. 0:00 – 2:00 00:00-02:00

    The video opens with a slide titled '3 Address Instruction' showing a table with headers: Opcode, Oprend1, Oprend2, and Destination. The instructor explains that the Program Counter manages sequencing, so the instruction doesn't need an address field. He notes that while programs are short in size, bits per instruction increase. He focuses on the example: 'in assembly language that evaluates X = (A + B) * (C + D)'. He breaks down the code: ADD R1, A, B for R1 <- M[A] + M[B], ADD R2, C, D for R2 <- M[C] + M[D], and MUL X, R1, R2 for M[X] <- R1 * R2. He underlines the equation and assembly lines to map them to the 3-address structure, specifically highlighting the Destination column for the final result.

  2. 2:00 – 3:08 02:00-03:08

    The slide updates to show bullet points discussing advantages and disadvantages. The text states, 'It is relatively better than 4 address instruction.' The instructor elaborates that because most operations are binary, this format is 'very convenient with human understanding and that is why very popular.' He points to the disadvantage: 'Disadvantage is still it is very much lengthy, which uses a lot of space.' He gestures towards the assembly code example to illustrate the length, showing how a single mathematical expression requires multiple lines of code, each taking up space in memory, which is a trade-off for the ease of programming.

The lecture systematically builds understanding by first defining the technical structure of 3-address instructions and explaining the role of the Program Counter. It then grounds this theory with a concrete example of evaluating a mathematical expression, mapping each step to the instruction format. The lesson concludes with a critical evaluation, weighing the benefits of human readability and binary operation convenience against the drawback of increased memory usage due to longer instruction lengths, providing a comprehensive view of this architectural choice.

Loading lesson…