Terminology for CPU Scheduling
Duration: 9 min
This video lesson is available to enrolled students.
Inside: a video lesson and guided study material.
Module outline
- General Intelligence & Reasoning: Analogy, Non Verbal Reasoning (Spatial Aptitude) (Spatial Reasoning) (Visual Reasoning), Series (Number and Letter Series) (Numerical Relations and Reasoning), Coding Decoding, Blood Relations, Directions (Direction Test), Ranking, Order and Sequence, Logical Sequence Of Words, Syllogisms, Venn Diagram, Deductive and Inductive Reasoning (Logical Deduction and Induction) (Prepositional Reasoning), Selection Decision Table (Decision Making), Data Sufficiency, Puzzle Solving (Puzzles), Data Arrangement, Cubes & Dices, Calendar, Clock, Arithmetic, Number System, HCF LCM, Verbal Analogy (Word Based Analogy), Visual Recognition and Figure Completion, Paper Folding and Cutting, Transformation of Shapes, Clocks and Calendars, Direction Sense, Cubes and Dice, Patterns in Two-Dimensional Figures, Seating Arrangements, Analogy and Classification, Logical Deduction and Induction, Alphabet and Word Tests, Mathematical Operations, Series Completion, Simplification and Approximation, Coding and Decoding, Numerical Reasoning, Assembling and Grouping of Shapes, Three-Dimensional Patterns and Visualization, Vocabulary, Number System, Averages, Mixtures and Alligation, Simple and Compound Interest, Percentages, Algebra, Speed, Time and Distance, Seating and Arrangement Puzzles, Traverse Surveying, Order, Ranking and Sequence, Constraint Puzzles, Syllogisms and Venn Diagrams, Reading Comprehension, Critical Reasoning, Permutations and Combinations, Narrative Sequencing, Project Monitoring, Resources and Safety, Profit, Loss and Discount, Ratio and Proportion, Time and Work, Mensuration, Data Interpretation, Powers, Surds and Logarithms, Sequences and Series, Articles and Determiners, Sentence Completion, Data Sufficiency, Blood Relations, Simple Interest and Compound Interest, Mixture and Alligation, Sequence and Series (Series), Speed Time and Distance, Algebra, Profit and Loss, Powers and Exponents (Surds and Indices), Permutation and Combination
- General Awareness: Physics, Chemistry, Biology, History, Geography, Polity, Indian Economy, Environment, Static General Knowledge, GK- Current Affairs, Artificial Intelligence, MS Office Applications, Terms & Abbreviations, Keyboard Shortcuts, Evolution of Indian Banking (Banking & Financial Awareness), Emerging Tech Trends
- Engineering Mathematics: Set Theory, Relations, Functions, Graph Theory, Group Theory, Propositional and Predicate Logic, Linear Algebra, Calculus, Probability, Statistics, Signal Space and Optimum Detection, Probability, Statistics
- Digital Logic: Digital Systems & Boolean Basics, Logic Gates & Hardware, Boolean Expression, Boolean Minimization, Combinational Circuit, Sequential Circuits, Number System, Number Representation, Floating Point Rep, Number Systems and Codes, Registers and Counters, Boolean Algebra and Logic Gates, Microprocessors and Microcontrollers, Logic Families and CMOS Logic, Microprocessors, Logic Gates and Boolean Algebra, Minimization of Boolean Functions, Timing, Hazards and Testing, Logic Families, Combinational Logic Design, Arithmetic Circuits, Waveform Generators and Timer Circuits, Semiconductor Memories and Programmable Logic Devices, Combinational Logic Circuits, Latches and Flip-Flops, Finite State Machines, Sequential Circuits and State Machines, Minimization of Boolean Functions, Arithmetic Circuits, Latches and Flip-Flops, Number Systems and Codes, Registers and Counters
- Computer Organisation & Architecture: Basics of COA, Cache Memory Organization, Input Output Organisation, Pipelining, Instr Formats & Modes, Control Unit Design, Programming the Basic Computer, Register Transfer and Microoperations, Semiconductor Memories and Programmable Logic, Processor Organization and Instructions, Memory Hierarchy and Input/Output, Registers and Counters
- Programming & Data Structures: C Fundamentals, Control Flow, Functions, Arrays & Pointers, Storage Classes, Structures & Enums, DMA, Macros, Scoping & File Handling, Introduction to DS, Array, Stack, Queue, Linked List, Tree, Graphs, Hashing, HTML Basics, OOPS with C++, Java, Object Oriented Technology
- Databases: Basics of DBMS, ER Diagram, Relational Model & Functional Dependencies, Keys & Integrity Constraints, Normalization (1NF - BCNF), Decomposition Properties & 4NF, File Organization & Indexing, Relational Algebra, SQL, Relational Calculus, Transaction Management, Concurrency Control, Database Recovery, Database Security & Authorization
- Algorithms: Algorithm Analysis, Time Complexity Analysis, Sorting Algorithms, Greedy Algorithms, Dynamic Programming, Minimum Spanning Trees, Shortest Path Algos
- Theory of Computation: Introduction to TOC, Deterministic FA (DFA), Non-Deterministic FA, Regular Expressions, Grammar, Regular Language Properties, Moore & Mealy Machines, Pushdown Automata & CFG, Turing Machines, Complexity Theory
- Compiler Design: Intro to Compilers, Lexical Analysis, Grammar & CFG, Syntax Analysis: Top-Down, Syntax Analysis: Bottom-Up, Semantic Analysis & SDT, Intermediate Code Gen, Code Optimization, Run Time Environment
- Operating System: Introduction to OS, Process Management, CPU Scheduling, Process Synchronization, Threads & Process Creation, Deadlock, Memory Management, Virtual Memory, Disc Scheduling, File Management, Security, Windows OS, Distributed Systems, Unix OS, Linux OS
- Computer Networks: Introduction to CN, DLL: Access Control, DLL: Flow Control, DLL: Error Control, DLL: Framing, Data Link Layer - Ethernet, Net Layer: IPv4 & Proto, Net Layer: IP Addressing, Net Layer:Routing Protocol, Transport Layer Services, TL: Congestion & UDP, Application Layer, Hardware Basics, Data Communication, Website, Browser & Services, Web Design & Development, Network Security, Cyber Threats and Malware Attacks, Cyber Safety and Security
- Full Length Mock Tests:
- Sectional Tests:
- Paper 2 - Full-length Mock Tests:
AI summary & chapters
AI Summary
An AI-generated summary of this video lecture.
This educational video provides a comprehensive lecture on Operating Systems, specifically focusing on the fundamental terminology used in process scheduling algorithms. The instructor systematically defines key performance metrics such as Arrival Time (AT), Burst Time (BT), Completion Time (CT), Turn Around Time (TAT), and Waiting Time (WT). The lecture transitions from theoretical definitions to a practical application, where the instructor solves a sample problem involving two processes, P1 and P2. Through a step-by-step walkthrough, he demonstrates how to construct a Gantt chart-like timeline and populate a data table to calculate the final scheduling metrics, ensuring students understand the mathematical relationships between these variables. The visual aids, including the slide and handwritten notes, serve as primary references for the formulas and calculations presented.
Chapters
0:00 – 2:00 00:00-02:00
The session begins with the instructor presenting a slide titled "Terminology" which lists five critical definitions essential for understanding process scheduling. He explains that Arrival Time (AT) is the specific moment a process enters the ready state, while Burst Time (BT) represents the total amount of CPU time required for a process to complete its execution. He further defines Completion Time (CT) as the time when the process finishes. Crucially, he writes out the formulas for Turn Around Time (TAT) as Completion Time minus Arrival Time, and Waiting Time as Turn Around Time minus Burst Time. To prepare for the example, he draws a table with columns for Process, AT, and BT, populating it with data for Process P1 (AT=0, BT=4) and Process P2 (AT=2, BT=6). The instructor gestures towards the slide to emphasize the definitions as he speaks.
2:00 – 5:00 02:00-05:00
The instructor moves to the practical application phase by drawing a timeline on the right side of the screen to visualize the execution order. He explains that since P1 arrives at time 0, it is the first to execute. He marks the start of P1 at 0 and, given its burst time of 4, extends the block to time 4. He highlights that P2 arrives at time 2 but cannot start immediately because the CPU is occupied by P1. Consequently, P2 waits in the ready queue. Once P1 completes at time 4, P2 begins its execution. With a burst time of 6, P2 runs from time 4 to time 10. The instructor then updates the main table, filling in the Completion Time (CT) column, recording 4 for P1 and 10 for P2, establishing the finish times for both processes. He uses a pen to point at the timeline and the table simultaneously to connect the visual representation with the data.
5:00 – 8:45 05:00-08:45
In the final segment, the instructor calculates the Turn Around Time (TAT) and Waiting Time (WT) for both processes using the formulas previously defined. He applies the formula TAT = CT - AT. For P1, he calculates 4 - 0 = 4. For P2, he calculates 10 - 2 = 8. He then uses the relationship TAT = Waiting Time + Burst Time to find the waiting time. For P1, the waiting time is 4 - 4 = 0, indicating it ran immediately without delay. For P2, the waiting time is 8 - 6 = 2, showing it waited for P1 to finish. He points to the slide to emphasize that Waiting Time is the difference between Turn Around Time and Burst Time. The video concludes with a fully populated table showing all calculated values, reinforcing the concepts of process scheduling efficiency and the impact of arrival times on waiting periods.
The video effectively bridges the gap between theoretical definitions and practical calculation in process scheduling. By starting with clear definitions on a slide and immediately applying them to a two-process example, the instructor creates a cohesive learning experience. The visual progression from a blank table to a filled timeline and finally to a complete data table helps students visualize the flow of time and resource allocation. The explicit calculation of waiting time highlights the cost of queuing, a key concept in operating systems. The instructor's methodical approach ensures that students can replicate the process for more complex scenarios involving multiple processes.

