2 Address

Duration: 3 min

This video lesson is available to enrolled students.

Return to /learn/SSC-JE-IMD-SCIENTIFIC-ASSISTANT-COMPUTER-SCIENCE/computer-organisation-architecture/instr-formats-modes/instruction-structure/asset-2-address after enrolling

Inside: a video lesson and guided study material.

Module outline

  1. General Intelligence & Reasoning: Analogy, Non Verbal Reasoning (Spatial Aptitude) (Spatial Reasoning) (Visual Reasoning), Series (Number and Letter Series) (Numerical Relations and Reasoning), Coding Decoding, Blood Relations, Directions (Direction Test), Ranking, Order and Sequence, Logical Sequence Of Words, Syllogisms, Venn Diagram, Deductive and Inductive Reasoning (Logical Deduction and Induction) (Prepositional Reasoning), Selection Decision Table (Decision Making), Data Sufficiency, Puzzle Solving (Puzzles), Data Arrangement, Cubes & Dices, Calendar, Clock, Arithmetic, Number System, HCF LCM, Verbal Analogy (Word Based Analogy), Visual Recognition and Figure Completion, Paper Folding and Cutting, Transformation of Shapes, Clocks and Calendars, Direction Sense, Cubes and Dice, Patterns in Two-Dimensional Figures, Seating Arrangements, Analogy and Classification, Logical Deduction and Induction, Alphabet and Word Tests, Mathematical Operations, Series Completion, Simplification and Approximation, Coding and Decoding, Numerical Reasoning, Assembling and Grouping of Shapes, Three-Dimensional Patterns and Visualization, Vocabulary, Number System, Averages, Mixtures and Alligation, Simple and Compound Interest, Percentages, Algebra, Speed, Time and Distance, Seating and Arrangement Puzzles, Traverse Surveying, Order, Ranking and Sequence, Constraint Puzzles, Syllogisms and Venn Diagrams, Reading Comprehension, Critical Reasoning, Permutations and Combinations, Narrative Sequencing, Project Monitoring, Resources and Safety, Profit, Loss and Discount, Ratio and Proportion, Time and Work, Mensuration, Data Interpretation, Powers, Surds and Logarithms, Sequences and Series, Articles and Determiners, Sentence Completion, Data Sufficiency, Blood Relations, Simple Interest and Compound Interest, Mixture and Alligation, Sequence and Series (Series), Speed Time and Distance, Algebra, Profit and Loss, Powers and Exponents (Surds and Indices), Permutation and Combination
  2. General Awareness: Physics, Chemistry, Biology, History, Geography, Polity, Indian Economy, Environment, Static General Knowledge, GK- Current Affairs, Artificial Intelligence, MS Office Applications, Terms & Abbreviations, Keyboard Shortcuts, Evolution of Indian Banking (Banking & Financial Awareness), Emerging Tech Trends
  3. Engineering Mathematics: Set Theory, Relations, Functions, Graph Theory, Group Theory, Propositional and Predicate Logic, Linear Algebra, Calculus, Probability, Statistics, Signal Space and Optimum Detection, Probability, Statistics
  4. Digital Logic: Digital Systems & Boolean Basics, Logic Gates & Hardware, Boolean Expression, Boolean Minimization, Combinational Circuit, Sequential Circuits, Number System, Number Representation, Floating Point Rep, Number Systems and Codes, Registers and Counters, Boolean Algebra and Logic Gates, Microprocessors and Microcontrollers, Logic Families and CMOS Logic, Microprocessors, Logic Gates and Boolean Algebra, Minimization of Boolean Functions, Timing, Hazards and Testing, Logic Families, Combinational Logic Design, Arithmetic Circuits, Waveform Generators and Timer Circuits, Semiconductor Memories and Programmable Logic Devices, Combinational Logic Circuits, Latches and Flip-Flops, Finite State Machines, Sequential Circuits and State Machines, Minimization of Boolean Functions, Arithmetic Circuits, Latches and Flip-Flops, Number Systems and Codes, Registers and Counters
  5. Computer Organisation & Architecture: Basics of COA, Cache Memory Organization, Input Output Organisation, Pipelining, Instr Formats & Modes, Control Unit Design, Programming the Basic Computer, Register Transfer and Microoperations, Semiconductor Memories and Programmable Logic, Processor Organization and Instructions, Memory Hierarchy and Input/Output, Registers and Counters
  6. Programming & Data Structures: C Fundamentals, Control Flow, Functions, Arrays & Pointers, Storage Classes, Structures & Enums, DMA, Macros, Scoping & File Handling, Introduction to DS, Array, Stack, Queue, Linked List, Tree, Graphs, Hashing, HTML Basics, OOPS with C++, Java, Object Oriented Technology
  7. Databases: Basics of DBMS, ER Diagram, Relational Model & Functional Dependencies, Keys & Integrity Constraints, Normalization (1NF - BCNF), Decomposition Properties & 4NF, File Organization & Indexing, Relational Algebra, SQL, Relational Calculus, Transaction Management, Concurrency Control, Database Recovery, Database Security & Authorization
  8. Algorithms: Algorithm Analysis, Time Complexity Analysis, Sorting Algorithms, Greedy Algorithms, Dynamic Programming, Minimum Spanning Trees, Shortest Path Algos
  9. Theory of Computation: Introduction to TOC, Deterministic FA (DFA), Non-Deterministic FA, Regular Expressions, Grammar, Regular Language Properties, Moore & Mealy Machines, Pushdown Automata & CFG, Turing Machines, Complexity Theory
  10. Compiler Design: Intro to Compilers, Lexical Analysis, Grammar & CFG, Syntax Analysis: Top-Down, Syntax Analysis: Bottom-Up, Semantic Analysis & SDT, Intermediate Code Gen, Code Optimization, Run Time Environment
  11. Operating System: Introduction to OS, Process Management, CPU Scheduling, Process Synchronization, Threads & Process Creation, Deadlock, Memory Management, Virtual Memory, Disc Scheduling, File Management, Security, Windows OS, Distributed Systems, Unix OS, Linux OS
  12. Computer Networks: Introduction to CN, DLL: Access Control, DLL: Flow Control, DLL: Error Control, DLL: Framing, Data Link Layer - Ethernet, Net Layer: IPv4 & Proto, Net Layer: IP Addressing, Net Layer:Routing Protocol, Transport Layer Services, TL: Congestion & UDP, Application Layer, Hardware Basics, Data Communication, Website, Browser & Services, Web Design & Development, Network Security, Cyber Threats and Malware Attacks, Cyber Safety and Security
  13. Full Length Mock Tests:
  14. Sectional Tests:
  15. Paper 2 - Full-length Mock Tests:
AI summary & chapters

AI Summary

An AI-generated summary of this video lecture.

The video lecture explains the 2 Address Instruction format in computer architecture. The instructor displays a slide titled "2 Address Instruction" outlining the structure: Opcode, Op1, and Op2. He emphasizes that the result is stored directly into the first operand (Op1), removing the need for a separate result address. This leads to shorter instruction lengths compared to 3-address instructions, making the system more efficient with fewer registers required. However, he notes a drawback: code optimization is relatively difficult. The lecture concludes with a practical application, demonstrating how to evaluate a mathematical expression using this instruction set.

Chapters

  1. 0:00 – 2:00 00:00-02:00

    The instructor introduces the "2 Address Instruction" format, displaying a table with columns for Opcode, Op1, and Op2. He underlines the text stating that the reference for the result is removed because the opcode1 is used for storing the result. He explains that this format has less length compared to 3-address instructions, making it more efficient with fewer registers required. He also points out that code optimization is relatively difficult in this architecture. He underlines specific phrases like "remove the reference for result" and "opcode1 is used for storing the result" to emphasize the mechanism.

  2. 2:00 – 3:28 02:00-03:28

    The instructor presents a program to evaluate the expression X = (A + B) * (C + D). He analyzes the assembly code line by line, starting with `MOV R1, A` which loads memory A into register R1. He explains `ADD R1, B` adds memory B to R1, storing the sum back in R1. He continues with `MOV R2, C` and `ADD R2, D` to compute the second part of the expression. Finally, `MUL R1, R2` multiplies the contents of R1 and R2, storing the result in R1, and `MOV X, R1` stores the final result in memory location X. He draws brackets to visualize the operation flow, connecting the assembly instructions to their corresponding mathematical operations on the right side of the slide.

The lecture effectively bridges theoretical instruction formats with practical assembly coding. By first defining the 2-address structure and its trade-offs (efficiency vs. optimization difficulty), the instructor sets the stage for understanding how complex expressions are broken down into simple machine operations. The step-by-step walkthrough of the example X = (A + B) * (C + D) solidifies the concept that the first operand acts as both a source and a destination, a crucial distinction for students learning about instruction set architectures. The visual aids, including underlining and bracketing, help clarify the data flow and the specific role of registers R1 and R2 in the computation process.

Loading lesson…