CIDR Practice Question

Duration: 8 min

This video lesson is available to enrolled students.

Return to /learn/SSC-JE-IMD-SCIENTIFIC-ASSISTANT-COMPUTER-SCIENCE/computer-networks/net-layer-ip-addressing/cidr-vlsm/asset-cidr-practice-question-4754 after enrolling

Inside: a video lesson and guided study material.

Module outline

  1. General Intelligence & Reasoning: Analogy, Non Verbal Reasoning (Spatial Aptitude) (Spatial Reasoning) (Visual Reasoning), Series (Number and Letter Series) (Numerical Relations and Reasoning), Coding Decoding, Blood Relations, Directions (Direction Test), Ranking, Order and Sequence, Logical Sequence Of Words, Syllogisms, Venn Diagram, Deductive and Inductive Reasoning (Logical Deduction and Induction) (Prepositional Reasoning), Selection Decision Table (Decision Making), Data Sufficiency, Puzzle Solving (Puzzles), Data Arrangement, Cubes & Dices, Calendar, Clock, Arithmetic, Number System, HCF LCM, Verbal Analogy (Word Based Analogy), Visual Recognition and Figure Completion, Paper Folding and Cutting, Transformation of Shapes, Clocks and Calendars, Direction Sense, Cubes and Dice, Patterns in Two-Dimensional Figures, Seating Arrangements, Analogy and Classification, Logical Deduction and Induction, Alphabet and Word Tests, Mathematical Operations, Series Completion, Simplification and Approximation, Coding and Decoding, Numerical Reasoning, Assembling and Grouping of Shapes, Three-Dimensional Patterns and Visualization, Vocabulary, Number System, Averages, Mixtures and Alligation, Simple and Compound Interest, Percentages, Algebra, Speed, Time and Distance, Seating and Arrangement Puzzles, Traverse Surveying, Order, Ranking and Sequence, Constraint Puzzles, Syllogisms and Venn Diagrams, Reading Comprehension, Critical Reasoning, Permutations and Combinations, Narrative Sequencing, Project Monitoring, Resources and Safety, Profit, Loss and Discount, Ratio and Proportion, Time and Work, Mensuration, Data Interpretation, Powers, Surds and Logarithms, Sequences and Series, Articles and Determiners, Sentence Completion, Data Sufficiency, Blood Relations, Simple Interest and Compound Interest, Mixture and Alligation, Sequence and Series (Series), Speed Time and Distance, Algebra, Profit and Loss, Powers and Exponents (Surds and Indices), Permutation and Combination
  2. General Awareness: Physics, Chemistry, Biology, History, Geography, Polity, Indian Economy, Environment, Static General Knowledge, GK- Current Affairs, Artificial Intelligence, MS Office Applications, Terms & Abbreviations, Keyboard Shortcuts, Evolution of Indian Banking (Banking & Financial Awareness), Emerging Tech Trends
  3. Engineering Mathematics: Set Theory, Relations, Functions, Graph Theory, Group Theory, Propositional and Predicate Logic, Linear Algebra, Calculus, Probability, Statistics, Signal Space and Optimum Detection, Probability, Statistics
  4. Digital Logic: Digital Systems & Boolean Basics, Logic Gates & Hardware, Boolean Expression, Boolean Minimization, Combinational Circuit, Sequential Circuits, Number System, Number Representation, Floating Point Rep, Number Systems and Codes, Registers and Counters, Boolean Algebra and Logic Gates, Microprocessors and Microcontrollers, Logic Families and CMOS Logic, Microprocessors, Logic Gates and Boolean Algebra, Minimization of Boolean Functions, Timing, Hazards and Testing, Logic Families, Combinational Logic Design, Arithmetic Circuits, Waveform Generators and Timer Circuits, Semiconductor Memories and Programmable Logic Devices, Combinational Logic Circuits, Latches and Flip-Flops, Finite State Machines, Sequential Circuits and State Machines, Minimization of Boolean Functions, Arithmetic Circuits, Latches and Flip-Flops, Number Systems and Codes, Registers and Counters
  5. Computer Organisation & Architecture: Basics of COA, Cache Memory Organization, Input Output Organisation, Pipelining, Instr Formats & Modes, Control Unit Design, Programming the Basic Computer, Register Transfer and Microoperations, Semiconductor Memories and Programmable Logic, Processor Organization and Instructions, Memory Hierarchy and Input/Output, Registers and Counters
  6. Programming & Data Structures: C Fundamentals, Control Flow, Functions, Arrays & Pointers, Storage Classes, Structures & Enums, DMA, Macros, Scoping & File Handling, Introduction to DS, Array, Stack, Queue, Linked List, Tree, Graphs, Hashing, HTML Basics, OOPS with C++, Java, Object Oriented Technology
  7. Databases: Basics of DBMS, ER Diagram, Relational Model & Functional Dependencies, Keys & Integrity Constraints, Normalization (1NF - BCNF), Decomposition Properties & 4NF, File Organization & Indexing, Relational Algebra, SQL, Relational Calculus, Transaction Management, Concurrency Control, Database Recovery, Database Security & Authorization
  8. Algorithms: Algorithm Analysis, Time Complexity Analysis, Sorting Algorithms, Greedy Algorithms, Dynamic Programming, Minimum Spanning Trees, Shortest Path Algos
  9. Theory of Computation: Introduction to TOC, Deterministic FA (DFA), Non-Deterministic FA, Regular Expressions, Grammar, Regular Language Properties, Moore & Mealy Machines, Pushdown Automata & CFG, Turing Machines, Complexity Theory
  10. Compiler Design: Intro to Compilers, Lexical Analysis, Grammar & CFG, Syntax Analysis: Top-Down, Syntax Analysis: Bottom-Up, Semantic Analysis & SDT, Intermediate Code Gen, Code Optimization, Run Time Environment
  11. Operating System: Introduction to OS, Process Management, CPU Scheduling, Process Synchronization, Threads & Process Creation, Deadlock, Memory Management, Virtual Memory, Disc Scheduling, File Management, Security, Windows OS, Distributed Systems, Unix OS, Linux OS
  12. Computer Networks: Introduction to CN, DLL: Access Control, DLL: Flow Control, DLL: Error Control, DLL: Framing, Data Link Layer - Ethernet, Net Layer: IPv4 & Proto, Net Layer: IP Addressing, Net Layer:Routing Protocol, Transport Layer Services, TL: Congestion & UDP, Application Layer, Hardware Basics, Data Communication, Website, Browser & Services, Web Design & Development, Network Security, Cyber Threats and Malware Attacks, Cyber Safety and Security
  13. Full Length Mock Tests:
  14. Sectional Tests:
  15. Paper 2 - Full-length Mock Tests:
AI summary & chapters

AI Summary

An AI-generated summary of this video lecture.

This educational video provides a step-by-step guide to Variable Length Subnet Masking (VLSM) using a specific networking problem. The instructor starts with a single Class C network, 200.1.2.0/24, and demonstrates how to divide it into three distinct subnets with varying host requirements: one subnet needing 126 hosts and two others needing 62 hosts each. The lecture emphasizes the importance of allocating the largest subnet first to prevent address fragmentation. Through a combination of whiteboard drawing and slide presentation, the instructor derives the correct subnet masks (/25 and /26) and calculates the precise IP address ranges for each resulting subnet, concluding with a summary of CIDR formulas.

Chapters

  1. 0:00 – 2:00 00:00-02:00

    The video begins with the instructor presenting a specific problem statement on the screen: "Consider we have a big single network having IP Address 200.1.2.0/24. We want to do subnetting and divide this network into 3 subnets, such that first contains 126 hosts, and other two contains 62 hosts each?" He starts the solution by writing the network address 200.1.2.0/24 at the top of the screen. He then draws a large blue circle to represent the entire available IP address space. To the left of the circle, he writes the number "3" in a red circle, indicating the three subnets required. He proceeds to draw a vertical red line down the center of the blue circle, effectively splitting the address space into two equal halves, which is the first step in allocating the largest subnet.

  2. 2:00 – 5:00 02:00-05:00

    The instructor focuses on the first requirement: a subnet with 126 hosts. He explains that to support 126 usable hosts, the subnet must have a block size of 128 (2^7), because 2^7 - 2 = 126. This means 7 bits are needed for hosts, leaving 25 bits for the network prefix (32 - 7 = 25). He writes /25 next to the left half of the circle. Next, he addresses the remaining right half of the circle, which needs to be split into two subnets of 62 hosts each. For 62 hosts, he calculates a block size of 64 (2^6), requiring 6 host bits and a prefix length of 26 (32 - 6 = 26). He draws a horizontal line to split the right side into two quadrants and writes "62" in each. He then writes the specific subnet IDs on the right: 200.1.2.128/26 and 200.1.2.192/26, explaining the binary values 10000000 (128) and 11000000 (192) that determine these starting addresses.

  3. 5:00 – 7:43 05:00-07:43

    The instructor transitions to a slide that summarizes the final calculated subnets. The slide is divided into three sections: "1st Subnet", "2nd Subnet", and "3rd Subnet". For the 1st Subnet, it lists the IP Address as 200.1.2.0, Direct Broadcast Address as 200.1.2.127, and the Range of IP Addresses as [200.1.2.0, 200.1.2.127]. The 2nd Subnet is listed as 200.1.2.128/26 with a range of [200.1.2.128, 200.1.2.191]. The 3rd Subnet is 200.1.2.192/26 with a range of [200.1.2.192, 200.1.2.255]. Finally, a slide titled "Designing subnets for CIDR Notations" appears, showing the formula n_sub = 32 - log_2 N_sub and stating the rule that the starting address must be divisible by the number of addresses in the sub-network.

The lecture successfully bridges the gap between theoretical subnetting rules and practical application. By visually splitting the address space circle, the instructor makes the abstract concept of binary division concrete. The progression from identifying the largest host requirement to calculating the corresponding prefix length and finally listing the specific IP ranges provides a clear, repeatable method for solving VLSM problems. The inclusion of the CIDR formula slide at the end reinforces the mathematical foundation behind the visual steps, ensuring students understand both the "how" and the "why" of the subnetting process.

Loading lesson…