CheckSum Part-2
Duration: 7 min
This video lesson is available to enrolled students.
Inside: a video lesson and guided study material.
Module outline
- General Intelligence & Reasoning: Analogy, Non Verbal Reasoning (Spatial Aptitude) (Spatial Reasoning) (Visual Reasoning), Series (Number and Letter Series) (Numerical Relations and Reasoning), Coding Decoding, Blood Relations, Directions (Direction Test), Ranking, Order and Sequence, Logical Sequence Of Words, Syllogisms, Venn Diagram, Deductive and Inductive Reasoning (Logical Deduction and Induction) (Prepositional Reasoning), Selection Decision Table (Decision Making), Data Sufficiency, Puzzle Solving (Puzzles), Data Arrangement, Cubes & Dices, Calendar, Clock, Arithmetic, Number System, HCF LCM, Verbal Analogy (Word Based Analogy), Visual Recognition and Figure Completion, Paper Folding and Cutting, Transformation of Shapes, Clocks and Calendars, Direction Sense, Cubes and Dice, Patterns in Two-Dimensional Figures, Seating Arrangements, Analogy and Classification, Logical Deduction and Induction, Alphabet and Word Tests, Mathematical Operations, Series Completion, Simplification and Approximation, Coding and Decoding, Numerical Reasoning, Assembling and Grouping of Shapes, Three-Dimensional Patterns and Visualization, Vocabulary, Number System, Averages, Mixtures and Alligation, Simple and Compound Interest, Percentages, Algebra, Speed, Time and Distance, Seating and Arrangement Puzzles, Traverse Surveying, Order, Ranking and Sequence, Constraint Puzzles, Syllogisms and Venn Diagrams, Reading Comprehension, Critical Reasoning, Permutations and Combinations, Narrative Sequencing, Project Monitoring, Resources and Safety, Profit, Loss and Discount, Ratio and Proportion, Time and Work, Mensuration, Data Interpretation, Powers, Surds and Logarithms, Sequences and Series, Articles and Determiners, Sentence Completion, Data Sufficiency, Blood Relations, Simple Interest and Compound Interest, Mixture and Alligation, Sequence and Series (Series), Speed Time and Distance, Algebra, Profit and Loss, Powers and Exponents (Surds and Indices), Permutation and Combination
- General Awareness: Physics, Chemistry, Biology, History, Geography, Polity, Indian Economy, Environment, Static General Knowledge, GK- Current Affairs, Artificial Intelligence, MS Office Applications, Terms & Abbreviations, Keyboard Shortcuts, Evolution of Indian Banking (Banking & Financial Awareness), Emerging Tech Trends
- Engineering Mathematics: Set Theory, Relations, Functions, Graph Theory, Group Theory, Propositional and Predicate Logic, Linear Algebra, Calculus, Probability, Statistics, Signal Space and Optimum Detection, Probability, Statistics
- Digital Logic: Digital Systems & Boolean Basics, Logic Gates & Hardware, Boolean Expression, Boolean Minimization, Combinational Circuit, Sequential Circuits, Number System, Number Representation, Floating Point Rep, Number Systems and Codes, Registers and Counters, Boolean Algebra and Logic Gates, Microprocessors and Microcontrollers, Logic Families and CMOS Logic, Microprocessors, Logic Gates and Boolean Algebra, Minimization of Boolean Functions, Timing, Hazards and Testing, Logic Families, Combinational Logic Design, Arithmetic Circuits, Waveform Generators and Timer Circuits, Semiconductor Memories and Programmable Logic Devices, Combinational Logic Circuits, Latches and Flip-Flops, Finite State Machines, Sequential Circuits and State Machines, Minimization of Boolean Functions, Arithmetic Circuits, Latches and Flip-Flops, Number Systems and Codes, Registers and Counters
- Computer Organisation & Architecture: Basics of COA, Cache Memory Organization, Input Output Organisation, Pipelining, Instr Formats & Modes, Control Unit Design, Programming the Basic Computer, Register Transfer and Microoperations, Semiconductor Memories and Programmable Logic, Processor Organization and Instructions, Memory Hierarchy and Input/Output, Registers and Counters
- Programming & Data Structures: C Fundamentals, Control Flow, Functions, Arrays & Pointers, Storage Classes, Structures & Enums, DMA, Macros, Scoping & File Handling, Introduction to DS, Array, Stack, Queue, Linked List, Tree, Graphs, Hashing, HTML Basics, OOPS with C++, Java, Object Oriented Technology
- Databases: Basics of DBMS, ER Diagram, Relational Model & Functional Dependencies, Keys & Integrity Constraints, Normalization (1NF - BCNF), Decomposition Properties & 4NF, File Organization & Indexing, Relational Algebra, SQL, Relational Calculus, Transaction Management, Concurrency Control, Database Recovery, Database Security & Authorization
- Algorithms: Algorithm Analysis, Time Complexity Analysis, Sorting Algorithms, Greedy Algorithms, Dynamic Programming, Minimum Spanning Trees, Shortest Path Algos
- Theory of Computation: Introduction to TOC, Deterministic FA (DFA), Non-Deterministic FA, Regular Expressions, Grammar, Regular Language Properties, Moore & Mealy Machines, Pushdown Automata & CFG, Turing Machines, Complexity Theory
- Compiler Design: Intro to Compilers, Lexical Analysis, Grammar & CFG, Syntax Analysis: Top-Down, Syntax Analysis: Bottom-Up, Semantic Analysis & SDT, Intermediate Code Gen, Code Optimization, Run Time Environment
- Operating System: Introduction to OS, Process Management, CPU Scheduling, Process Synchronization, Threads & Process Creation, Deadlock, Memory Management, Virtual Memory, Disc Scheduling, File Management, Security, Windows OS, Distributed Systems, Unix OS, Linux OS
- Computer Networks: Introduction to CN, DLL: Access Control, DLL: Flow Control, DLL: Error Control, DLL: Framing, Data Link Layer - Ethernet, Net Layer: IPv4 & Proto, Net Layer: IP Addressing, Net Layer:Routing Protocol, Transport Layer Services, TL: Congestion & UDP, Application Layer, Hardware Basics, Data Communication, Website, Browser & Services, Web Design & Development, Network Security, Cyber Threats and Malware Attacks, Cyber Safety and Security
- Full Length Mock Tests:
- Sectional Tests:
- Paper 2 - Full-length Mock Tests:
AI summary & chapters
AI Summary
An AI-generated summary of this video lecture.
This lecture segment, titled CheckSum Part-2, explains the one's complement checksum mechanism used in Internet protocols. The instructor begins by introducing a simple example using five 4-bit numbers: (7, 11, 12, 0, 6). The sender first calculates the arithmetic sum of these values, which is 36. However, because Internet protocols use one's complement arithmetic to handle data that exceeds the bit width, the sender does not simply send 36. Instead, it sends the negative (complement) of the sum, which is formally called the checksum. The lecture then transitions to a detailed sender/receiver diagram to demonstrate how wrapping and complementing are performed. At the sender site, the sum of 36 is wrapped (the carry bits are added back to the lower bits) to produce a wrapped sum of 6. The one's complement of this wrapped sum is then calculated, yielding the final checksum value of 9. The packet transmitted to the receiver therefore contains the sequence (7, 11, 12, 0, 6, 9). At the receiver site, the receiver sums all received values, including the checksum. The sum is 45. This value is then wrapped to produce a wrapped sum of 15. Finally, the one's complement of 15 is calculated, resulting in 0. A final checksum value of 0 at the receiver indicates that no errors were detected during transmission, confirming the integrity of the received data. The lecture uses binary representations in yellow detail panels to illustrate the specific wrapping and complementing steps, such as showing 10 0100 = 36 and 101101 = 45.
Chapters
0:00 – 2:00 00:00-02:00
The instructor introduces the checksum concept using a slide headed 'CHECKSUM'. A specific example set of five 4-bit numbers, (7, 11, 12, 0, 6), is presented. The slide initially shows that the sender calculates a sum of 36, but then clarifies that to make the receiver's job easier, the sender actually transmits the negative (complement) of this sum. The on-screen text explicitly states: 'we send the negative (complement) of the sum, called the checksum', and displays the tuple (7, 11, 12, 0, 6, -36). The instructor uses handwritten circles and arrows to highlight the individual values in the sequence.
2:00 – 5:00 02:00-05:00
The lecture introduces one's complement arithmetic as the method for handling data that exceeds the bit width. A new slide titled 'One's Complement' explains that a negative number is represented by inverting all bits. The instructor points to the binary representation of 36 and its wrapped sum within a yellow box detailing the wrapping process. A sender/receiver diagram is then used to illustrate the error detection process, showing how the sum of 36 is wrapped and complemented at both sites to manage overflow.
5:00 – 7:00 05:00-07:00
A detailed side-by-side diagram demonstrates the full calculation. At the sender site, the sum of 36 is wrapped to 6 and complemented to find the checksum value of 9. The central packet box shows the transmitted sequence '7, 11, 12, 0, 6, 9'. At the receiver site, the sum including the checksum is 45. This wraps to 15 and complements to 0, indicating a successful transmission. Yellow panels captioned 'Details of wrapping and complementing' display binary rows such as 10 0100 = 36 and 101101 = 45, ending in 1001 (9) on the left and 1000 (0) on the right.
The core pedagogical goal of this segment is to bridge the gap between a simple arithmetic sum and the practical implementation of checksums in network protocols. The instructor effectively uses a concrete numerical example (7, 11, 12, 0, 6) to ground abstract concepts. The progression moves from the definition of a checksum as the negative complement of a sum, to the necessity of one's complement arithmetic for handling overflow (wrapping), and finally to a complete sender-receiver verification cycle. The key takeaway for students is that the checksum is not just a sum, but a wrapped and complemented value designed so that if the receiver performs the same operations on all received data (including the checksum), a result of zero confirms error-free transmission. The use of binary detail panels is crucial for students to understand the mechanical process of wrapping (adding carry bits) and complementing (inverting bits).

