Serial In Serial Out Register

Duration: 8 min

This video lesson is available to enrolled students.

Return to /learn/RSSB-BASIC-COMPUTER-INSTRUCTOR/paper-2-digital-logic-systems/sequential-circuits/shift-registers/asset-serial-in-serial-out-register after enrolling

Inside: a video lesson and guided study material.

Module outline

  1. About the Course: About the Course
  2. Paper-1 & 2 | Basic Numeracy: Ratio and Proportion (Ratios), Divisibility Rules, Mixture and Alligation, Permutation and Combination, Logarithm, Number System, HCF LCM, Sequence and Series (Series), Speed Time and Distance, Percentage, Average, Mensuration and Geometry, Age Problems, Arithmetic, Statistics, Probability, Profit and Loss, Simple Interest and Compound Interest, Partnership, Speed Mathematics and Basic Mathematics, Algebra, Powers and Exponents (Surds and Indices), Time and Work, Pipe and Cistern, RSSB Specific Videos - Basic Numeracy
  3. Paper-1 & 2 | Data Interpretation: Data Interpretation
  4. Paper-1 & 2 | General Mental Ability: Mental Ability, RSSB Specific Videos - Mental Ability
  5. Paper-1 & 2 | Logical Reasoning and Analytical Ability: Series (Number and Letter Series) (Numerical Relations and Reasoning), Coding Decoding, Data Sufficiency, Non Verbal Reasoning (Spatial Aptitude) (Spatial Reasoning) (Visual Reasoning), Syllogisms, Seating Arrangements, Blood Relations, Directions (Direction Test), Analytical Reasoning (Counting Figures Reasoning), Puzzle Solving (Puzzles), Calendar, Clock, Cubes & Dices, Venn Diagram, Analogy, Ranking, Order and Sequence, Deductive and Inductive Reasoning (Logical Deduction and Induction) (Prepositional Reasoning), Data Arrangement, Logical Sequence Of Words, Crypt Arithmetic
  6. Paper-1 & 2 | Decision Making and Problem Solving: Selection Decision Table (Decision Making)
  7. Paper-1 | General Science: Physics, Biology, Chemistry, RSSB Specific Videos
  8. Paper-1 | General Awareness: State Wise GK, GK- Current Affairs
  9. Paper - 2 | Digital Logic Systems: Digital Systems & Boolean Basics, Logic Gates & Hardware, Combinational Circuit, Sequential Circuits
  10. Paper-2 | Database Management System: Basics of DBMS, ER Diagram, Relational Model & Functional Dependencies, Keys & Integrity Constraints, Normalization (1NF - BCNF), Decomposition Properties & 4NF, Relational Calculus, Relational Algebra, SQL, NoSQL
  11. Paper-2 | Data Structures & Algorithms: Introduction to DS, Array, Stack, Queue, Linked List, Tree, Graphs, Algorithm Analysis, Sorting Algorithms, Intro to Compilers, Hashing
  12. Paper 2 | Data Communication and Network Security: Introduction to CN, Data Communication, Data Link Layer - Ethernet, DLL: Error Control, Net Layer: IPv4 & Proto, Net Layer: IP Addressing, Application Layer, Hardware basics, Network Security, Ethical Hacking
  13. Paper-2 | Operating Systems: Introduction to OS, Process Management, Memory Management, File Management, Deadlock
  14. Paper-2 | Computer Organization and Architecture: Basics of COA, Floating Point Rep, Cache Memory Organization, Input Output Organisation, Instr Formats & Modes, Control Unit Design, Register Transfer and Microoperations, Programming the Basic Computer, Number System, Number Representation
  15. Paper 2 | System Analysis and Design: Fundamentals of Systems and Information Systems, Fundamentals of Software Engineering, SDLC and Development Approaches, Software Documentation and Software Requirements Specification (SRS), SDD and Quality Assurance, Security, Risk Management & Maintenance, Software Testing
  16. Paper-2 | C Programming: C Fundamentals, Control Flow, Functions, Arrays & Pointers, Storage Classes, Structures & Enums, DMA, Macros, Scoping & File Handling
  17. Paper 2 | OOPS , C++ , JAVA: Language Design, OOPS with C++, Java, .Net Programming, Java Fundamentals
  18. Paper 2 | Python: Introduction to Python, Tokens, Variables, Data Types, I/O, Operators & Expressions, Control Flow & Looping, Collections & Strings, Functions & Modules, File Handling & Data Analysis
  19. Emerging Trends and AI: Emerging Tech Trends, Artificial Intelligence
  20. Paper-2 | Data Processing (Ms-Office): MS Office Applications
  21. Paper-2 | Internet and Web Technologies: HTML Basics, CSS, XML, JavaScript-Basics, Internet Fundamentals, Protocols & Services, Web Publishing & Hosting, Server Side & Security, Emerging Technologies, Terms & Abbreviations, Cyber Threats and Malware Attacks, Role of Internet and Web Services, Security in Mobile and Wireless Computing
  22. Paper 2 | Pedagogy: Child Development, Theories, Concept of Pedagogy, Inclusive Education, Experiential Pedagogy, Assessment & Evaluation, Psychology, Curriculum Framework & Reforms, National Education Policy (NEP) 2020
  23. Live Classes: RSSB Live Sessions
  24. Paper 1 - Full Mock Tests:
  25. Paper 2 - Full Mock Tests:
  26. BCI Previous Year Papers:
AI summary & chapters

AI Summary

An AI-generated summary of this video lecture.

The video lecture introduces the Serial In-Serial Out (SISO) shift register, a fundamental digital circuit component. The instructor explains that data enters the register one bit at a time through a single data line and exits serially. A circuit diagram featuring four cascaded D flip-flops is used to illustrate the architecture, where the output of one stage feeds the input of the next. The lesson progresses to a practical demonstration using a specific binary sequence, followed by a quantitative analysis of the clock cycles required for writing and reading data, concluding with a comparison table of different register types.

Chapters

  1. 0:00 – 2:00 00:00-02:00

    The video opens with a slide titled "Serial In-Serial Out (SISO)". The instructor defines the SISO shift register as a device allowing serial input (one bit at a time through a single data line) and producing a serial output. The slide text states, "Since there is only one output, the data leaves the shift register one bit at a time in a serial pattern, thus the name Serial-In-Serial-Out Shift Register." A circuit diagram is displayed showing four D flip-flops connected in a cascade. The output Q of Flip Flop 1 connects to the input D of Flip Flop 2, and so on, up to Flip Flop 4. The Serial Input enters Flip Flop 1, and the Serial Output is taken from Flip Flop 4. The instructor gestures towards the diagram to explain the flow of data. He points out the clock line connecting all flip-flops, indicating they are synchronous.

  2. 2:00 – 5:00 02:00-05:00

    The instructor transitions to a practical example to demonstrate the shifting operation. He writes the binary sequence "1100" at the top of the board, indicating the input data to be shifted. Below the circuit diagram, a truth table is presented with columns labeled "Sequence", "Input", "Q2", "Q1", "Q0", and "Output". Although the diagram shows four flip-flops, the table headers suggest a focus on specific outputs or a 3-bit subset, but the instructor proceeds to fill the table row by row. He writes "1" in the first row under "Input" for Sequence 1. He draws arrows from the input to the first flip-flop and then between flip-flops to visualize the data movement. He explains that with each clock pulse, the bit shifts from one stage to the next. He fills the "Input" column with the sequence 1, 1, 0, 0 corresponding to sequences 1, 2, 3, and 4. He draws arrows indicating the propagation of the '1' from the first flip-flop to the subsequent ones. He writes the sequence numbers 1, 2, 3, 4 in the first column.

  3. 5:00 – 8:19 05:00-08:19

    The instructor completes the explanation of the shifting process and moves to a summary comparison table. A new slide appears with a table comparing different register types: SISO, SIPO, PISO, and PIPO. The columns are "No of clock (write)", "No of clock (Read)", and "total". For the SISO row, he writes 'n' for the write clock, 'n-1' for the read clock, and '2n-1' for the total clock pulses required. He explains that the main use of a SISO is to act as a delay element. The text on the slide confirms this: "In SISO registers to provide n bit data serially in it requires n clock pulse and to provide serial output it requires n - 1 clock pulses." He emphasizes that to read out the data completely, it takes n-1 additional pulses after the n pulses used to write the data in. He points to the '2n-1' value to highlight the total time complexity.

The lecture provides a comprehensive overview of the Serial In-Serial Out (SISO) shift register. It starts with a theoretical definition and circuit diagram, showing how four D flip-flops are cascaded to shift data serially. The instructor then demonstrates the operation using a specific input sequence "1100", visualizing the bit movement through a truth table and arrows. Finally, the lesson concludes with a quantitative analysis of clock cycles, establishing that a 4-bit SISO register requires n write pulses and n-1 read pulses, totaling 2n-1 pulses, highlighting its utility as a delay element.

Loading lesson…