Consider a byte addressable memory system with 32bits Virtual addresses,…
Consider a byte addressable memory system with 32bits Virtual addresses, 30bits physical addresses and 4KB page size. The TLB is 4-way set associative, with 16 total entries. The cache is 2-way set associative with 8-byte blocks, and 16 total lines. Determine the virtual address bits assigned to Virtual Page Number (VPN), Virtual Page Offset (VPO), TLB Index (TLBI) and TLB tag (TLBT) in that order from the options given below :
- A.
VPN: 12, VPO: 12, TLBI: 2, TLBT: 8
- B.
VPN: 20, VPO: 12, TLBI: 8, TLBT: 2
- C.
VPN: 20, VPO: 12, TLBI: 4, TLBT: 16
- D.
VPN: 20, VPO: 12, TLBI: 2, TLBT: 18
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