Consider a logic gate circuit, with 8 input lines \(\left(\mathrm{D}_{0},…

2022

Consider a logic gate circuit, with 8 input lines \(\left(\mathrm{D}_{0}, \mathrm{D}_{1} \ldots \ldots \mathrm{D}_{7}\right)\) and 3 output lines \(\left(\mathrm{A}_{0}, \mathrm{~A}_{1}, \mathrm{~A}_{2}\right)\) specified by following operations

\(\begin{array}{l} A_{2}=D_{4}+D_{5}+D_{6}+D_{7} \\ A_{1}=D_{2}+D_{3}+D_{6}+D_{7} \\ A_{0}=D_{1}+D_{3}+D_{5}+D_{7} \end{array}\)

Where + indicates logical OR operation. This circuit is

  1. A.

    3×8 multiplexer

  2. B.

    Decimal to BCD converter

  3. C.

    Octal to Binary encoder

  4. D.

    Priority encoder

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Correct answer: C

Concept: An encoder is a combinational circuit with 2ⁿ input lines — of which only one is active (HIGH) at a time — and n output lines that together output the binary index of whichever input line is active. Formally, output bit Ak is HIGH exactly for those inputs Di whose index i has bit k equal to 1 (Aₖ = OR of all Di with bit k of i set). This differs from a multiplexer, which uses select lines to route ONE of several data inputs to a SINGLE output (not several independent OR-combination outputs); from a decimal-to-BCD converter, which maps 10 decimal-digit inputs to a 4-bit BCD output; and from a priority encoder, a variant that additionally resolves which input wins when more than one is active together, needing extra priority logic.

Application: Here there are 8 input lines (D0–D7) and 3 output lines (A2, A1, A0):

  • A2 = D4 + D5 + D6 + D7 is HIGH exactly for indices with bit 2 set — 4, 5, 6, 7 — the most-significant output bit.

  • A1 = D2 + D3 + D6 + D7 is HIGH exactly for indices with bit 1 set — 2, 3, 6, 7.

  • A0 = D1 + D3 + D5 + D7 is HIGH exactly for indices with bit 0 set — the odd indices 1, 3, 5, 7.

Together (A2A1A0) reproduces the 3-bit binary index of whichever single input line is active — exactly what an encoder does. It is not a multiplexer (no select lines, and three independent outputs instead of one), not a decimal-to-BCD converter (wrong input/output counts: 10 inputs/4 outputs vs the 8 inputs/3 outputs here), and not a priority encoder (no additional logic here to arbitrate between simultaneously active inputs).

Cross-check: If only D5 is active (index 5 = binary 101), then A2 picks up D5 → 1, A1 does not include D5 → 0, and A0 includes D5 → 1, giving (A2A1A0) = 101 = 5 — exactly the index of the active input, confirming the encoder behaviour.

So this circuit is an Octal to Binary encoder.

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