Practice_Question_Os_physical Addressing

Duration: 2 min

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Module outline

  1. About Course: About the Course
  2. Paper 1 | General Studies: State Wise GK
  3. Paper 1 | Information and Communication Technology: Role of Internet and Web Services, Security in Mobile and Wireless Computing
  4. Paper 1 | Current Affairs: GK- Current Affairs
  5. Paper 2 | Discrete Mathematical Structure: Digital Systems & Boolean Basics, Logic Gates & Hardware, Boolean Expression, Boolean Minimization, Set Theory, Relations, Functions, Graph Theory, Group Theory, Propositional and Predicate Logic, Probability
  6. Paper 2 | Digital Computer Organization And Architecture: Number System, Number Representation, Sequential Circuits, Combinational Circuit, Basics of COA, Floating Point Rep, Cache Memory Organization, Input Output Organisation, Pipelining, Instr Formats & Modes, Register Transfer and Microoperations, Control Unit Design, Programming the Basic Computer
  7. Paper 2 | C Programming: C Fundamentals, Control Flow, Functions, Arrays & Pointers, Storage Classes, Structures & Enums, DMA, Macros, Scoping & File Handling
  8. Paper 2 | Programming Languages & Object-Oriented Programming Concepts: Java, OOPS with C++, Java Fundamentals, Array, String, IO & References
  9. Paper 2 | Python: Introduction to Python, Tokens, Variables, Data Types, I/O, Operators & Expressions, Control Flow & Looping, Collections & Strings, Functions & Modules, File Handling & Data Analysis
  10. Paper 2 | Data Structure And Algorithms: Introduction to DS, Array, Stack, Queue, Linked List, Tree, Graphs, Hashing, Algorithm Analysis, Time Complexity Analysis, Sorting Algorithms, Greedy Algorithms, Minimum Spanning Trees, Advanced Algorithms
  11. Paper 2 | Operating System: Introduction to OS, Process Management, CPU Scheduling, Process Synchronization, Deadlock, Threads & Process Creation, Memory Management, Virtual Memory, Disc Scheduling, File Management, Unix OS
  12. Paper 2 | Theory Of Computation: Introduction to TOC, Deterministic FA (DFA), Non-Deterministic FA, Regular Expressions, Grammar, Regular Language Properties, Moore & Mealy Machines, Pushdown Automata & CFG, Turing Machines, Complexity Theory
  13. Paper 2 | Compiler Design: Intro to Compilers, Lexical Analysis, Grammar & CFG, Syntax Analysis: Top-Down, Syntax Analysis: Bottom-Up, Semantic Analysis & SDT, Intermediate Code Gen, Code Optimization, Run Time Environment
  14. Paper 2 | Database Management System: Basics of DBMS, ER Diagram, Relational Model & Functional Dependencies, Keys & Integrity Constraints, Normalization (1NF - BCNF), Decomposition Properties & 4NF, Relational Algebra, SQL, Transaction Management, Concurrency Control, Database Recovery, Database Security & Authorization, Enhanced Data Models
  15. Paper 2 | Computer Network And Information Security: Introduction to CN, Data Communication, Application Layer, Hardware basics, Cyber Threats and Malware Attacks, Network Security, DLL: Access Control, DLL: Flow Control, DLL: Error Control, DLL: Framing, Data Link Layer - Ethernet, Net Layer: IPv4 & Proto, Net Layer: IP Addressing, Net Layer:Routing Protocol, Transport Layer Services, TL: Congestion & UDP
  16. Paper 2 | Software Engineering: Fundamentals of Software Engineering, Software Requirements and Quality Assurance, Software Design, Estimation and Metrics, Software Testing, Software Maintenance and Configuration Management
  17. Paper 2 | Current Trends & Technologies: Emerging Tech Trends, Approaches to AI, Search Algorithms, Game Playing, Knowledge Representation, Planning, Multi Agent Systems, Fuzzy Sets, Natural Language Processing, Artificial Neural Networks, Genetic Algorithms, Artificial Intelligence, Data Warehousing & Mining, Electronic Data Interchange and E-Commerce, Terms & Abbreviations
  18. Paper 2 | Full Length Mock Tests:
AI summary & chapters

AI Summary

An AI-generated summary of this video lecture.

The video presents a problem involving memory management in operating systems, specifically focusing on the use of relocation and limit registers to determine valid memory access. The instructor displays a table listing five processes (P0 to P4) with their corresponding Limit and Relocation register values. Below the table, a list of logical address requests from these processes is provided. The core task is to evaluate each request to determine if it is legal (within bounds) or illegal (out of bounds) and, if legal, to calculate the resulting physical address. The instructor systematically analyzes each process request, comparing the requested logical address against the process's limit register value. For valid requests, he demonstrates the calculation of the physical address by adding the logical address to the base address found in the relocation register.

Chapters

  1. 0:00 – 2:00 00:00-02:00

    The instructor begins by analyzing the first request from process P0, which is 450. He checks the limit register for P0, which is 500. Since 450 is less than 500, he marks it as legal. He then calculates the physical address by adding the logical address (450) to the relocation register value (1200), resulting in 1650. Next, he moves to P1 with a request of 300. The limit register for P1 is 275. Since 300 is greater than 275, he marks this attempt as illegal. He proceeds to P2 with a request of 210. The limit is 212, so 210 is valid. He calculates the physical address as 880 + 210 = 1090. Then, for P3, the request is 450, but the limit is 420, making it illegal. Finally, he addresses P4 with a request of 80. The limit is 118, so it is legal, and the physical address is calculated as 200 + 80.

  2. 2:00 – 2:16 02:00-02:16

    The instructor completes the calculation for process P4. He writes down the sum of the relocation register (200) and the logical address (80), resulting in a physical address of 280. He circles the final answer and briefly concludes the problem-solving session, having successfully identified the illegal attempts and calculated the physical addresses for the valid ones.

The lesson effectively demonstrates the mechanism of address binding and protection in memory management. By comparing logical addresses against limit registers, the system ensures processes do not access unauthorized memory regions. The addition of the relocation register value shifts the logical address space to the correct physical location, illustrating how dynamic relocation works in a multitasking environment.

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