How many memory accesses required by the following instructions (opcode,…

How many memory accesses required by the following instructions (opcode, Destination Register, SourceRegister1, sourceRegister2)?ADD r1, r2, r3MUL r1, r2, (r3)

DIV r1, r2, @ (r4)

Here (r3) represent absolute addressing mode.

And @(r4) represent indirect addressing mode. Suppose every instruction is one word long, as well as every address.

  1. A.

    4

  2. B.

    5

  3. C.

    6

  4. D.

    8

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