A 32-bit adder is formed by cascading 4-bit CLA adders. The gate delays…

ISRO Scientist/Engineer SC · December 2017 · Computer Science

A 32-bit adder is formed by cascading 4-bit CLA adders. The gate delays (latency) for getting the sum bits is

  1. A.

    16

  2. B.

    18

  3. C.

    17

  4. D.

    19

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