Consider the logic circuit given below: ImageQ = ?

2014

Consider the logic circuit given below:

ISRO-2014-boolean-algebraImage

Q = ?

  1. A.

    A'C + BC ' + CD

  2. B.

    ABC + C'D

  3. C.

    AB + BC' + BD'

  4. D.

    AB' + AC' + C'D

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Correct answer: C

The circuit consists entirely of NAND gates. We analyze the output step-by-step from left to right.

1. Top-left NAND gate: Inputs are D and C. Output = (CD)'. This signal feeds into the second stage.

2. Middle NAND gate: Inputs are the output from step 1, (CD)', and input B. Output = ((CD)' · B)'. Applying De Morgan's Law: (CD)'' + B' = CD + B'.

3. Bottom-left NAND gate: Inputs are A and B. Output = (AB)'. This signal feeds into the final stage.

4. Final NAND gate: Inputs are the outputs from steps 2 and 3, which are (CD + B') and (AB)'. Output Q = ((CD + B') · (AB)')'.

5. Simplify Q: Apply De Morgan's Law to the final expression.

Q = (CD + B')' + ((AB)')'

Q = (CD)' · (B')' + AB

Q = (C' + D') · B + AB

Q = BC' + BD' + AB

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