Which of the following is/are cause hazard in pipelined CPU ?

Which of the following is/are cause hazard in pipelined CPU ?

  1. A.

    2 consecutive instruction and both need to read memory at same time.

  2. B.

    An instruction contains jump statement.

  3. C.

    2 consecutive instructions and one instruction uses the result of previous instruction.

  4. D.

    none of these

Attempted by 71 students.

Sign up free to check your answer

Sign up free

Explore the full course: Gate Guidance By Sanchit Sir

Loading lesson…