RISC Vs CISC

Duration: 7 min

This video lesson is available to enrolled students.

Return to /learn/DSSSB-TGT-COMPUTER-SCIENCE-COMPLETE-COURSE/computer-systems-architecture/control-unit-design/risc-vs-cisc-arch/asset-risc-vs-cisc after enrolling

Inside: a video lesson and guided study material.

Module outline

  1. About Course: About the Course
  2. Section A: General Awareness: Polity, Physics, Biology, Chemistry, Static General Knowledge, History, Geography, Indian Economy, GK- Current Affairs, Evolution of Indian Banking (Banking & Financial Awareness), Environment
  3. Section A: General Intelligence & Reasoning ability: Series (Number and Letter Series) (Numerical Relations and Reasoning), Coding Decoding, Data Sufficiency, Non Verbal Reasoning (Spatial Aptitude) (Spatial Reasoning) (Visual Reasoning), Analytical Reasoning (Counting Figures Reasoning), Blood Relations, Syllogisms, Deductive and Inductive Reasoning (Logical Deduction and Induction) (Prepositional Reasoning), Seating Arrangements, Directions (Direction Test), Puzzle Solving (Puzzles), Calendar, Clock, Cubes & Dices, Selection Decision Table (Decision Making), Logical Sequence Of Words, Crypt Arithmetic, Venn Diagram, Data Arrangement, Inequality, Analogy, Ranking, Order and Sequence, TCS NQT Advanced Reasoning Ability
  4. Section A: Arithmetical & Numerical Ability: Ratio and Proportion (Ratios), Divisibility Rules, Data Interpretation, Mixture and Alligation, Permutation and Combination, Logarithm, Number System, HCF LCM, Sequence and Series (Series), Speed Time and Distance, Percentage, Average, Profit and Loss, Simple Interest and Compound Interest, Time and Work, Pipe and Cistern, Mensuration and Geometry, Powers and Exponents (Surds and Indices), Algebra, Probability, Mental Ability, Age Problems, Partnership, Statistics, Arithmetic, Speed Mathematics and Basic Mathematics, Miscellaneous
  5. Section A: English Language & Comprehension: Vocabulary, Subject Verb Agreement (Verb Noun Agreement), Adjectives, Tenses, Comprehension / Reading Comprehension / Unseen Passages (Critical Reasoning) (Paragraph Questions), Articles, Sentence Construction, Preposition, Direct and Indirect Speech, Sentence Completion (Fill in the blanks), Sentence Re-arrangements (Para Jumbles) (Narrative Sequencing), Modals, Active Passive Voice (Voice), Sentence Correction (Error Correction), Adverb, Conjunction, Cloze Test (Cloze Passage)
  6. Section A: Hindi Language & Comprehension: भाषा, लिपि, ध्वनि, वर्ण, अक्षर, स्वर, व्यंजन, मात्रा और संयुक्ताक्षर, वर्तनी, वर्ण-विन्यास, अनुस्वार, अनुनासिक, चंद्रबिंदु और ‘र’ के रूप, शब्द, पद और शब्द-भेद, संज्ञा और सर्वनाम, विशेषण और क्रिया, लिंग, वचन, पुरुष और कारक, काल, वाच्य, वाक्य और वाक्य-भेद, संधि, समास, विलोम शब्द, पर्यायवाची शब्द, सामान्य अशुद्धियाँ, अनेक शब्दों के लिए एक शब्द, मुहावरे और लोकोक्तियाँ, अपठित गद्यांश और अपठित पद्यांश, Multi-Topic Content (Cross-Concept Material), वर्णमाला
  7. Section B: Programming, Data Structures, OOP & Java: C Fundamentals, Control Flow, Functions, Arrays & Pointers, Storage Classes, Structures & Enums, DMA, Macros, Scoping & File Handling, Introduction to DS, Array, Stack, Queue, Linked List, Tree, Graphs, Hashing, Java, OOPS with C++, Language Design, Intro to Compilers, Visual Basics, Syntax Analysis: Bottom-Up, Object Oriented Technology
  8. Section B: Computer Networks, TCP/IP & Network Security: Introduction to CN, Data Communication, DLL: Flow Control, DLL: Access Control, DLL: Error Control, Data Link Layer - Ethernet, Net Layer: IPv4 & Proto, Net Layer: IP Addressing, Transport Layer Services, TL: Congestion & UDP, Application Layer, Hardware basics, Network Access Technologies, Network Security, Society, Law & Ethics, Mobile Computing, Net Layer:Routing Protocol, Cyber Safety and Security
  9. Section B: Teaching Methodology: Child Development, Concept of Pedagogy, Theories, Inclusive Education, Experiential Pedagogy, Assessment & Evaluation, Curriculum Framework & Reforms, National Education Policy (NEP) 2020, Psychology, Teaching-Learning Process, Personality Development, Teaching Methods & Strategies, Learning and Motivation, Learners & Learning Process, Factors Affecting Teaching, Methods of Teaching, Nature, Objectives & Characteristics of Teaching, Teaching-Learning Aids & ICT Integration, Classroom Management & Communication, Evaluation, Assessment & Measurement, Curriculum & School Environment, Inclusive Education & Special Needs, Professional Development & Ethics
  10. Section B: Digital Electronics / Boolean Logic: Digital Systems & Boolean Basics, Logic Gates & Hardware, Boolean Expression, Boolean Minimization, Combinational Circuit, Sequential Circuits, Number System, Number Representation, Analog-Digital Conversion
  11. Section B: Operating Systems & Linux: Introduction to OS, Process Management, CPU Scheduling, Process Synchronization, Threads & Process Creation, Deadlock, Memory Management, Virtual Memory, File Management, Disc Scheduling, Unix OS, Linux OS, Distributed Systems, Windows OS
  12. Section B: Data Base Management System: Basics of DBMS, ER Diagram, Relational Model & Functional Dependencies, Keys & Integrity Constraints, Normalization (1NF - BCNF), Decomposition Properties & 4NF, Relational Algebra, SQL, File Organization & Indexing, Transaction Management, Concurrency Control, Database Security & Authorization, Database Recovery, Data Warehousing & Mining
  13. Section B: Internet & Web Technologies: Website, Browser & Services, Internet Fundamentals, Web Design & Development, Protocols & Services, Web Publishing & Hosting, Server Side & Security, HTML Basics, CSS, Emerging Technologies, JavaScript-Basics, .Net Programming, Electronic Data Interchange and E-Commerce, XML
  14. Section B: Computer Fundamentals, IT Basics & Architecture: Basics of COA, Cache Memory Organization, Input Output Organisation, Register Transfer and Microoperations, Control Unit Design, Programming the Basic Computer, Terms & Abbreviations, MS Office Applications, Instr Formats & Modes, Floating Point Rep
  15. Section B: Python Language: Introduction to Python, Tokens, Variables, Data Types, I/O, Operators & Expressions, Control Flow & Looping, Collections & Strings, Functions & Modules, File Handling & Data Analysis
  16. Section B: Software Engineering: Fundamentals of Software Engineering, Software Requirements and Quality Assurance, Software Design, Estimation and Metrics, Software Testing, Software Maintenance and Configuration Management, extras, Fundamentals of Systems and Information Systems
  17. Section B: Design & Analysis of Algorithms: Algorithm Analysis, Time Complexity Analysis, Sorting Algorithms, Greedy Algorithms, Dynamic Programming, Minimum Spanning Trees, Shortest Path Algos, Advanced Algorithms
  18. Section B: Mathematics: Linear Algebra, Calculus, Trigonometry, Vectors, Set Theory, Functions, Relations, Propositional and Predicate Logic, Research Process Steps, Graph Theory
  19. Section B: Computer Graphics, Multimedia & Mobile Computing: Basics of Computer Graphics, 2-D Geometrical Transforms and Viewing, 3-D Object Representation, Geometric Transformations and Viewing, Multimedia
  20. Section B: Emerging Trends: Emerging Tech Trends, Knowledge Representation, Natural Language Processing
  21. DSSSB Previous Year Paper:
  22. Business Studies and Management: Business Communication, Business Organization and Management, Financial Accounting, Business Economics, Management Information System (MIS), Knowledge Management & New Economy
AI summary & chapters

AI Summary

An AI-generated summary of this video lecture.

The lecture introduces Reduced Instruction Set Computer (RISC) architecture, defining it by its use of fewer, simpler instructions for faster execution with reduced memory dependency. It details key characteristics like fixed-length instructions, register-based operations, and hardwired control units. The historical context is provided, highlighting Stanford's MIPS and Berkeley's RISC projects in the 1980s, alongside modern implementations like ARM and IBM PowerPC. Finally, the lecture contrasts RISC with Complex Instruction Set Computer (CISC) using a detailed comparison table covering instruction count, addressing modes, and control unit complexity.

Chapters

  1. 0:00 – 2:00 00:00-02:00

    The instructor defines RISC using a slide listing core characteristics. He underlines phrases such as 'use fewer instructions with simple constructs' and 'executed much faster within the CPU without having to use memory as often.' Key features listed include relatively few instructions, few addressing modes, and memory access limited to load and store instructions. The slide emphasizes that all operations are done within CPU registers and uses a fixed-length, easily decoded instruction format. This section establishes the foundational definition of RISC as a processor design philosophy focused on efficiency and speed through simplicity.

  2. 2:00 – 5:00 02:00-05:00

    The lecture expands on RISC technicalities, noting 'Single-cycle instruction execution' and 'Hardwired rather than microprogrammed control.' The instructor discusses the history, mentioning that while forerunners existed in the 60s and 70s, the modern concept dates to the 1980s, specifically citing projects at 'Stanford University' and the 'University of California, Berkeley.' He explains that Stanford's MIPS became a successful architecture, while Berkeley's RISC gave the name to the concept and was commercialized as SPARC. The segment concludes with a list of RISC designs including ARC, Alpha, ARM, and MIPS, noting ARM's dominance in smartphones and supercomputers like Summit, which was the world's fastest supercomputer as of January 2020.

  3. 5:00 – 6:34 05:00-06:34

    The focus shifts to Complex Instruction Set Computer (CISC), defined as a computer where single instructions can execute several low-level operations. The instructor presents a comparison table contrasting CISC and RISC formats. He underlines that CISC has a 'Large number of instructions (around 1000)' and 'Variable length instruction format,' whereas RISC has 'Relatively Few numbers of instruction' and 'Fixed length easy to decode instruction format.' The table also contrasts operand manipulation (memory vs. registers) and control units (microprogrammed vs. hardwired), highlighting that CISC is 'Powerful but costly' while RISC is 'Relatively less powerful but cheap.' This comparison clarifies the trade-offs between the two architectures.

The video provides a comprehensive overview of RISC architecture, starting with its fundamental definition and operational advantages like speed and simplicity. It traces the historical evolution from early concepts to the pivotal 1980s projects at Stanford and Berkeley that popularized the technology. The lecture then broadens the scope to include modern RISC implementations like ARM and IBM PowerPC, establishing their relevance in both consumer electronics and high-performance computing. Finally, the instructor solidifies understanding by contrasting RISC with CISC, using a structured table to highlight differences in instruction complexity, addressing modes, and hardware implementation, effectively distinguishing the two major processor design philosophies and their respective trade-offs in cost and performance.

Loading lesson…