Control Hazards

Duration: 4 min

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Module outline

  1. About Course: About the Course
  2. Paper-2 | Programming & Data Structures: C Fundamentals, Control Flow, Functions, Arrays & Pointers, Storage Classes, Structures & Enums, DMA, Macros, Scoping & File Handling, Introduction to DS, Array, Stack, Queue, Linked List, Tree, Graphs, Hashing
  3. Paper-2 | Databases / DBMS & SQL: Basics of DBMS, ER Diagram, Relational Model & Functional Dependencies, Keys & Integrity Constraints, Normalization (1NF - BCNF), Decomposition Properties & 4NF, File Organization & Indexing, Relational Algebra, SQL, Relational Calculus, Transaction Management, Concurrency Control
  4. Paper-2 | Algorithms: Algorithm Analysis, Time Complexity Analysis, Sorting Algorithms, Greedy Algorithms, Dynamic Programming, Minimum Spanning Trees, Shortest Path Algos
  5. Paper-2 | Computer Networks & Security: Introduction to CN, Data Communication, DLL: Access Control, DLL: Flow Control, DLL: Error Control, DLL: Framing, Data Link Layer - Ethernet, Net Layer: IPv4 & Proto, Net Layer: IP Addressing, Net Layer:Routing Protocol, Transport Layer Services, TL: Congestion & UDP, Application Layer, Hardware Basics, Network Access Technologies, Network Security
  6. Paper-2 | Digital Logic: Digital Systems & Boolean Basics, Logic Gates & Hardware, Boolean Expression, Boolean Minimization, Combinational Circuit, Sequential Circuits, Number System, Number Representation, Floating Point Rep
  7. Paper-2 | Operating System: Introduction to OS, Process Management, CPU Scheduling, Process Synchronization, Threads & Process Creation, Deadlock, Memory Management, Virtual Memory, Disc Scheduling, File Management
  8. Paper-2 | Theory of Computation: Introduction to TOC, Deterministic FA (DFA), Non-Deterministic FA, Regular Expressions, Grammar, Regular Language Properties, Moore & Mealy Machines, Pushdown Automata & CFG, Turing Machines
  9. Paper-2 | Computer Organization & Architecture: Basics of COA, Cache Memory Organization, Input Output Organisation, Pipelining, Instr Formats & Modes, Control Unit Design, Programming the Basic Computer
  10. Paper-2 | Compiler Design: Intro to Compilers, Lexical Analysis, Grammar & CFG, Syntax Analysis: Top-Down, Syntax Analysis: Bottom-Up, Semantic Analysis & SDT, Intermediate Code Gen, Code Optimization, Run Time Environment
  11. Paper-1 | General Awareness: Polity, Physics, Biology, Chemistry, Static General Knowledge, GK- Current Affairs, History, Geography, Indian Economy, Environment
  12. Paper-1 | Logical Reasoning: Series (Number and Letter Series) (Numerical Relations and Reasoning), Coding Decoding, Non Verbal Reasoning (Spatial Aptitude) (Spatial Reasoning) (Visual Reasoning), Data Interpretation, Blood Relations, Syllogisms, Deductive and Inductive Reasoning (Logical Deduction and Induction) (Prepositional Reasoning), Selection Decision Table (Decision Making), Clock, Calendar, Cubes & Dices, Directions (Direction Test), Analogy, Seating Arrangements, Analytical Reasoning (Counting Figures Reasoning)
  13. Paper-1 | Quantitative Aptitude: Ratio and Proportion (Ratios), Mixture and Alligation, Permutation and Combination, Number System, HCF LCM, Speed Time and Distance, Average, Age Problems, Percentage, Profit and Loss, Time and Work, Pipe and Cistern, Simple Interest and Compound Interest, Powers and Exponents (Surds and Indices), Mensuration and Geometry, Probability, Statistics, Arithmetic, Algebra
  14. Paper-1 | English: Vocabulary, Comprehension / Reading Comprehension / Unseen Passages (Critical Reasoning) (Paragraph Questions), Sentence Re-arrangements (Para Jumbles) (Narrative Sequencing), Sentence Correction (Error Correction), Sentence Completion (Fill in the blanks), Sentence Construction, Cloze Test (Cloze Passage)
  15. Coal India Previous Year Paper:
  16. Engineering Mathematics: Set Theory, Relations, Functions, Graph Theory, Group Theory, Propositional and Predicate Logic, Linear Algebra, Calculus
  17. Coal India Mock Test:
AI summary & chapters

AI Summary

An AI-generated summary of this video lecture.

The lecture focuses on Control Hazards in pipelined processors, specifically addressing the inefficiencies caused by branch instructions. The instructor explains that when a branch instruction is encountered, the processor may have already fetched and partially executed subsequent instructions that turn out to be incorrect. This leads to a 'hazard' where these instructions must be discarded. The session transitions into a quantitative analysis, teaching students how to calculate the Cycles Per Instruction (CPI) penalty based on the frequency of branch instructions and the number of stalls they incur.

Chapters

  1. 0:00 – 2:00 00:00-02:00

    The instructor begins by defining the problem of Control Hazards. He presents a scenario where instruction I1 is a branch, and the next instruction to execute is I10. However, the processor has already partially executed I1, I2, I3, which is the core problem. A flowchart is displayed, categorizing 'Branch Instruction' into 'Conditional' and 'Unconditional'. The 'Conditional' branch further splits into 'Condition true (Jump)' and 'Condition false (No Jump)'. The instructor writes a vertical sequence I1, I2, I3, I4, I5 to represent the instruction stream, emphasizing that the decision to jump is not immediate.

  2. 2:00 – 4:30 02:00-04:30

    The instructor visualizes the hazard using a pipeline timing diagram with stages IF, ID, EX, and WB. He marks I1 as the branch instruction and shows red crosses over I2 and I3 in the IF and ID stages, indicating they are flushed. He then introduces a calculation problem: 'Consider a system where 20% instruction are branch instruction... Find the CPI'. He calculates the CPI for three cases. Case 1: 1 Stall results in 0.8 x 1 + 0.2 x 2 = 1.2. Case 2: 2 Stalls results in 0.8 x 1 + 0.2 x 3 = 1.4. Case 3: 3 Stalls results in 0.8 x 1 + 0.2 x 4 = 1.6. This demonstrates how stall cycles directly increase the average CPI.

The lecture effectively bridges the gap between theoretical pipeline hazards and practical performance metrics. By first illustrating the structural problem of branch instructions wasting cycles through a flowchart and timing diagram, the instructor sets the stage for the mathematical solution. The calculation of CPI serves as a practical application, showing how a 20% branch frequency with varying stall penalties (1, 2, or 3 cycles) degrades performance from a base CPI of 1.0 to 1.2, 1.4, and 1.6 respectively. This progression helps students understand the tangible cost of control dependencies in processor design.

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