Practice Question
Duration: 3 min
This video lesson is available to enrolled students.
Inside: a video lesson and guided study material.
Module outline
- About Course: About the Course
- Paper-2 | Programming & Data Structures: C Fundamentals, Control Flow, Functions, Arrays & Pointers, Storage Classes, Structures & Enums, DMA, Macros, Scoping & File Handling, Introduction to DS, Array, Stack, Queue, Linked List, Tree, Graphs, Hashing
- Paper-2 | Databases / DBMS & SQL: Basics of DBMS, ER Diagram, Relational Model & Functional Dependencies, Keys & Integrity Constraints, Normalization (1NF - BCNF), Decomposition Properties & 4NF, File Organization & Indexing, Relational Algebra, SQL, Relational Calculus, Transaction Management, Concurrency Control
- Paper-2 | Algorithms: Algorithm Analysis, Time Complexity Analysis, Sorting Algorithms, Greedy Algorithms, Dynamic Programming, Minimum Spanning Trees, Shortest Path Algos
- Paper-2 | Computer Networks & Security: Introduction to CN, Data Communication, DLL: Access Control, DLL: Flow Control, DLL: Error Control, DLL: Framing, Data Link Layer - Ethernet, Net Layer: IPv4 & Proto, Net Layer: IP Addressing, Net Layer:Routing Protocol, Transport Layer Services, TL: Congestion & UDP, Application Layer, Hardware Basics, Network Access Technologies, Network Security
- Paper-2 | Digital Logic: Digital Systems & Boolean Basics, Logic Gates & Hardware, Boolean Expression, Boolean Minimization, Combinational Circuit, Sequential Circuits, Number System, Number Representation, Floating Point Rep
- Paper-2 | Operating System: Introduction to OS, Process Management, CPU Scheduling, Process Synchronization, Threads & Process Creation, Deadlock, Memory Management, Virtual Memory, Disc Scheduling, File Management
- Paper-2 | Theory of Computation: Introduction to TOC, Deterministic FA (DFA), Non-Deterministic FA, Regular Expressions, Grammar, Regular Language Properties, Moore & Mealy Machines, Pushdown Automata & CFG, Turing Machines
- Paper-2 | Computer Organization & Architecture: Basics of COA, Cache Memory Organization, Input Output Organisation, Pipelining, Instr Formats & Modes, Control Unit Design, Programming the Basic Computer
- Paper-2 | Compiler Design: Intro to Compilers, Lexical Analysis, Grammar & CFG, Syntax Analysis: Top-Down, Syntax Analysis: Bottom-Up, Semantic Analysis & SDT, Intermediate Code Gen, Code Optimization, Run Time Environment
- Paper-1 | General Awareness: Polity, Physics, Biology, Chemistry, Static General Knowledge, GK- Current Affairs, History, Geography, Indian Economy, Environment
- Paper-1 | Logical Reasoning: Series (Number and Letter Series) (Numerical Relations and Reasoning), Coding Decoding, Non Verbal Reasoning (Spatial Aptitude) (Spatial Reasoning) (Visual Reasoning), Data Interpretation, Blood Relations, Syllogisms, Deductive and Inductive Reasoning (Logical Deduction and Induction) (Prepositional Reasoning), Selection Decision Table (Decision Making), Clock, Calendar, Cubes & Dices, Directions (Direction Test), Analogy, Seating Arrangements, Analytical Reasoning (Counting Figures Reasoning)
- Paper-1 | Quantitative Aptitude: Ratio and Proportion (Ratios), Mixture and Alligation, Permutation and Combination, Number System, HCF LCM, Speed Time and Distance, Average, Age Problems, Percentage, Profit and Loss, Time and Work, Pipe and Cistern, Simple Interest and Compound Interest, Powers and Exponents (Surds and Indices), Mensuration and Geometry, Probability, Statistics, Arithmetic, Algebra
- Paper-1 | English: Vocabulary, Comprehension / Reading Comprehension / Unseen Passages (Critical Reasoning) (Paragraph Questions), Sentence Re-arrangements (Para Jumbles) (Narrative Sequencing), Sentence Correction (Error Correction), Sentence Completion (Fill in the blanks), Sentence Construction, Cloze Test (Cloze Passage)
- Coal India Previous Year Paper:
- Engineering Mathematics: Set Theory, Relations, Functions, Graph Theory, Group Theory, Propositional and Predicate Logic, Linear Algebra, Calculus
- Coal India Mock Test:
AI summary & chapters
AI Summary
An AI-generated summary of this video lecture.
The video features an instructor solving a computer architecture problem regarding instruction set architecture (ISA) and opcode expansion. The problem involves a 16-bit instruction format with a 128-word memory size, supporting both 1-address and 2-address instructions. Given two 2-address instructions, the goal is finding supported 1-address instructions. The instructor derives x * 2^7 + y * 2^14 = 2^16, where x and y are instruction counts. He substitutes y=2 and solves for x, finding the answer to be 256. He breaks down bit allocation for addresses and opcodes.
Chapters
0:00 – 2:00 00:00-02:00
The instructor begins by reading the problem statement displayed on the screen, highlighting critical constraints: 16 bit instruction size, 128 words memory, and the existence of two, 2-address instruction. He establishes the total instruction space as 2^16. He explains that since memory has 128 words, each address field requires 7 bits (2^7 = 128). He formulates the equation x * 2^7 + y * 2^14 = 2^16, where x represents the number of 1-address instructions and y represents the number of 2-address instructions. He substitutes y = 2 into the equation, leading to x * 2^7 + 2 * 2^14 = 2^16. He simplifies 2 * 2^14 to 2^15. The equation becomes x * 2^7 = 2^16 - 2^15. He factors out 2^15 to get x * 2^7 = 2^15(2 - 1), which simplifies to x * 2^7 = 2^15. Solving for x, he finds x = 2^8, which equals 256. He circles the result x = 256 on the board.
2:00 – 2:39 02:00-02:39
In the final segment, the instructor double-checks his work. He writes 256 / 2^7 at the top left, dividing the number of 1-address instructions by the address space per instruction. This yields 2, representing the number of available opcode prefixes. This matches the unused 2-address opcodes (4 total - 2 used). He confirms the steps, and the video ends with x = 256 visible.
The lecture demonstrates opcode expansion in instruction set design. By allocating bits for addresses based on memory size (7 bits for 128 words), remaining bits are used for opcodes. The instructor calculates capacity for different instruction types by subtracting used space from total available space. The verification step confirms the derived instructions align with available opcode prefixes.