Practice Question (Gate 1993)

Duration: 3 min

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Module outline

  1. Section A | English: Vocabulary, Comprehension / Reading Comprehension / Unseen Passages (Critical Reasoning) (Paragraph Questions), Preposition, Sentence Correction (Error Correction), Sentence Completion (Fill in the blanks), Articles, Sentence Re-arrangements (Para Jumbles) (Narrative Sequencing), Verbal Analogy (Word Based Analogy)
  2. Section A | Quant Aptitude: Ratio and Proportion (Ratios), Mixture and Alligation, Permutation and Combination, Number System, HCF LCM, Sequence and Series (Series), Speed Time and Distance, Arithmetic, Algebra, Powers and Exponents (Surds and Indices), Average, Age Problems, Percentage, Profit and Loss, Partnership, Time and Work, Simple Interest and Compound Interest, Mensuration and Geometry, Probability, Pipe and Cistern
  3. Section A | Reasoning: Series (Number and Letter Series) (Numerical Relations and Reasoning), Coding Decoding, Data Sufficiency, Calendar, Clock, Blood Relations, Directions (Direction Test), Seating Arrangements, Ranking, Order and Sequence, Puzzle Solving (Puzzles)
  4. Section B | C Programming: C Programming by Yash Sir, Coding Questions by Yash Sir
  5. Section B | Data Structures: Algorithm Analysis, Greedy Algorithms, Time Complexity Analysis, Sorting Algorithms, Introduction to DS, Array, Stack, Queue, Linked List, Tree, Graphs
  6. Section B | OOP (C++): Object Oriented Programming (OOPS), Programming in C++
  7. Section B | OS: Introduction to OS, Process Management, CPU Scheduling, Process Synchronization, Threads & Process Creation, Deadlock, Memory Management, Virtual Memory, Disc Scheduling, File Management, Windows OS
  8. Section B | Networking: Introduction to CN, Data Communication, DLL: Access Control, DLL: Flow Control, DLL: Error Control, DLL: Framing, Data Link Layer - Ethernet, Net Layer: IPv4 & Proto, Net Layer: IP Addressing, Net Layer:Routing Protocol, Transport Layer Services, TL: Congestion & UDP, Application Layer, Hardware basics
  9. Section B | AI & Big Data Basics: AI & ML by Arun Sir, Big Data Systems
  10. Section C | Digital Electronics: Digital Systems & Boolean Basics, Logic Gates & Hardware, Boolean Expression, Boolean Minimization, Combinational Circuit, Sequential Circuits, Number System, Number Representation, Analog-Digital Conversion
  11. Section A, C | Comp. Fundamentals, COA: Basics of COA, Floating Point Rep, Cache Memory Organization, Input Output Organisation, Pipelining, Instr Formats & Modes, Control Unit Design, Register Transfer and Microoperations, Multiprocessors, Programming the Basic Computer
  12. MOCK TEST:
AI summary & chapters

AI Summary

An AI-generated summary of this video lecture.

This educational video provides a detailed walkthrough of a GATE 1993 computer organization problem involving moving arm disk storage. The instructor systematically breaks down the given specifications to calculate two key performance metrics: average latency (P) and data transfer rate (Q). The lecture focuses on converting units and applying standard formulas for disk access time and throughput.

Chapters

  1. 0:00 – 2:00 00:00-02:00

    The session begins with the instructor reading the problem statement displayed on the screen. He lists the specifications: 'Number of tracks/recording surface = 200', 'Disk rotation speed = 2400 rpm', and 'Track storage capacity = 62,500 bits'. He underlines the target variables, 'average latency' and 'data transfer rate'. He starts the calculation by converting the rotation speed from rpm to rotations per second, writing '2400 / 60' on the board. This yields 40 rotations per second. Consequently, he calculates the time for one full rotation as 1/40 seconds. To make this more readable, he converts the time into milliseconds by multiplying by 1000, resulting in '25 ms' for one full rotation.

  2. 2:00 – 2:40 02:00-02:40

    The instructor proceeds to find the average latency, explaining that it is half the time of one full rotation. He writes '12.5 ms' on the board, identifying this as the value for P. Next, he tackles the data transfer rate (Q). He establishes a relationship where 25 ms corresponds to the transfer of 62,500 bits. To find the rate per second, he sets up a proportion: 1 second corresponds to (62,500 / 25) * 1000 bits. He performs the division 62,500 / 25 to get 2,500, and then multiplies by 1000 to get 2,500,000. He writes the final answer as '= 2.5 x 10^6 b/s', completing the calculation for Q.

The video effectively demonstrates how to derive disk performance parameters from basic physical specifications. By first determining the rotational period, the instructor establishes the foundation for calculating both latency and transfer rates. The step-by-step board work clarifies unit conversions between seconds and milliseconds, ensuring students understand the magnitude of the values involved. This methodical approach is crucial for solving similar problems in computer architecture exams.

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