Numerical of Page Table

Duration: 7 min

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Inside: a video lesson and guided study material.

Module outline

  1. About the Course: About the Course
  2. Section 1 | Language (Hindi): भाषा, लिपि, ध्वनि, वर्ण, अक्षर, स्वर, व्यंजन, मात्रा और संयुक्ताक्षर, वर्तनी, वर्ण-विन्यास, अनुस्वार, अनुनासिक, चंद्रबिंदु और ‘र’ के रूप, शब्द, पद और शब्द-भेद, संज्ञा और सर्वनाम, विशेषण और क्रिया, लिंग, वचन, पुरुष और कारक, काल, वाच्य, वाक्य और वाक्य-भेद, संधि, समास, विलोम शब्द, पर्यायवाची शब्द, सामान्य अशुद्धियाँ, अनेक शब्दों के लिए एक शब्द, मुहावरे और लोकोक्तियाँ, अपठित गद्यांश और अपठित पद्यांश, Multi-Topic Content (Cross-Concept Material), वर्णमाला
  3. Section 1 | Language (उर्दू भाषा — 22 प्रश्न (निश्चित)): Spelling & Diacritics, Grammar (اسم, فعل, صفت, ضمیر), Vocabulary, Idioms & Proverbs, Comprehension
  4. Section 1 | Language (বাংলা / बांग्ला भाषा — 22 प्रश्न (निश्चित)): Bangla Script and Sounds, Bangla Grammar and Usage, Bangla Word Formation and Vocabulary, Reading and Text Interpretation
  5. Section 1 | Language (English): Vocabulary, Noun, Subject Verb Agreement (Verb Noun Agreement), Adjectives, Tenses, Pronoun, Verb, Adverb, Preposition, Articles, Determiner, Conjunction, Modals, Active Passive Voice (Voice), Direct and Indirect Speech, Sentence Correction (Error Correction), Sentence Completion (Fill in the blanks), Sentence Construction, Sentence Re-arrangements (Para Jumbles) (Narrative Sequencing), Comprehension / Reading Comprehension / Unseen Passages (Critical Reasoning) (Paragraph Questions), Cloze Test (Cloze Passage), Verbal Analogy (Word Based Analogy), Facts, Inference and Judgements
  6. Section 2 | Primary Maths & Reasoning: Ratio and Proportion (Ratios), Divisibility Rules, Mixture and Alligation, Permutation and Combination, Number System, HCF LCM, Sequence and Series (Series), Speed Time and Distance, Series (Number and Letter Series) (Numerical Relations and Reasoning), Coding Decoding, Non Verbal Reasoning (Spatial Aptitude) (Spatial Reasoning) (Visual Reasoning), Percentage, Average, Profit and Loss, Simple Interest and Compound Interest, Time and Work, Mensuration and Geometry, Age Problems, Arithmetic, Powers and Exponents (Surds and Indices), Algebra, Probability, Trigonometry, Syllogisms, Seating Arrangements, Blood Relations, Directions (Direction Test), Analytical Reasoning (Counting Figures Reasoning), Puzzle Solving (Puzzles), Calendar, Clock, Cubes & Dices, Venn Diagram, Data Arrangement, Inequality, Analogy, Ranking, Order and Sequence
  7. Section 2 | General Awareness (GK + Current Affairs): Polity, Physics, Biology, State Wise GK, Chemistry, History, Geography, Indian Economy, Environment, GK- Current Affairs, Static General Knowledge
  8. Section 3 | Computer System and Org. (CSO): Basics of COA, Floating Point Rep, Cache Memory Organization, Instr Formats & Modes, Programming the Basic Computer, Input Output Organisation, Register Transfer and Microoperations, Control Unit Design
  9. Section 3 | Database Management System: Basics of DBMS, ER Diagram, Relational Model & Functional Dependencies, Keys & Integrity Constraints, Normalization (1NF - BCNF), Decomposition Properties & 4NF, SQL, File Organization & Indexing, Relational Algebra, Relational Calculus, Transaction Management, Concurrency Control
  10. Section 3 | Operating System: Introduction to OS, Process Management, CPU Scheduling, Threads & Process Creation, Memory Management, Virtual Memory, Disc Scheduling, File Management, Process Synchronization
  11. Section 3 | Computer Networks: Introduction to CN, Data Communication, DLL: Access Control, DLL: Flow Control, DLL: Error Control, Data Link Layer - Ethernet, Net Layer: IPv4 & Proto, Net Layer: IP Addressing, Transport Layer Services, TL: Congestion & UDP, Application Layer, Hardware basics
  12. Section 3 | Data Structures: Introduction to DS, Array, Stack, Queue, Linked List, Tree, Graphs, Hashing, Algorithm Analysis, Time Complexity Analysis, Sorting Algorithms, Greedy Algorithms, Minimum Spanning Trees, Shortest Path Algos
  13. Section 3 | Theory Of Computation & Compiler Design: Introduction to TOC, Deterministic FA (DFA), Non-Deterministic FA, Regular Expressions, Grammar, Regular Language Properties, Moore & Mealy Machines, Pushdown Automata & CFG, Turing Machines, Intro to Compilers, Lexical Analysis, Grammar & CFG, Syntax Analysis: Top-Down, Syntax Analysis: Bottom-Up, Semantic Analysis & SDT, Intermediate Code Gen, Code Optimization
  14. Section 3 | Emerging Trends (AI, Societal Ethics & MS Office): Artificial Intelligence, Emerging Tech Trends, Society, Law & Ethics, MS Office Applications
  15. Section 3 | Software Engineering: Fundamentals of Software Engineering, Software Requirements and Quality Assurance, Software Design, Estimation and Metrics, Software Maintenance and Configuration Management, Software Testing
  16. Section 3 | C Programming: C Fundamentals, Control Flow, Functions, Arrays & Pointers, Storage Classes, Structures & Enums, DMA, Macros, Scoping & File Handling
  17. Section 3 | OOPS, C++, JAVA, HTML: OOPS with C++, Java, HTML Basics, CSS
  18. Section 3 | Java: Java Fundamentals, Array, String, IO & References
  19. Section 3 | Python: Introduction to Python, Tokens, Variables, Data Types, I/O, Operators & Expressions, Control Flow & Looping, Collections & Strings, Functions & Modules, File Handling & Data Analysis
  20. Section 3 | Digital Electronics: Digital Systems & Boolean Basics, Logic Gates & Hardware, Boolean Expression, Boolean Minimization, Combinational Circuit, Sequential Circuits, Number System, Number Representation
  21. Section 3 | Multimedia: Multimedia
  22. BPSC Previous Year Papers:
  23. BPSC Full Mock Tests:
AI summary & chapters

AI Summary

An AI-generated summary of this video lecture.

The video is an educational lecture on computer architecture, specifically focusing on paging hardware and memory management. The instructor uses a digital whiteboard to solve problems presented in a table format. The table includes columns for System Memory (SM), Logical Address (LA), Main Memory (MM), Physical Address (PA), page bits (p), frame bits (f), offset bits (d), addressable unit, Process Size, and Page Table (PT) Size. The instructor systematically fills in the missing values for three different scenarios, demonstrating the relationships between logical and physical addresses, page table sizes, and memory constraints. He also references a diagram illustrating the paging hardware, showing how the CPU generates a logical address, which is split into a page number and offset, used to index a page table to find a frame number, which is then combined with the offset to form the physical address. The lecture emphasizes the calculation of bits required for different address components based on given memory sizes.

Chapters

  1. 0:00 – 2:00 00:00-02:00

    In the first segment, the instructor focuses on the first row of the table. He writes '34' under the Logical Address (LA) column and '64MB' under Main Memory (MM). He calculates the page bits p as 24 and frame bits f as 16. He determines the offset bits d to be 10. He writes the Physical Address (PA) bits as 26. He calculates the Page Table (PT) Size as 2MB. He points to the diagram below the table, indicating the logical address is split into p and d, where p indexes the page table to retrieve the frame number f. The diagram shows a CPU block, a logical address block split into p and d, a page table block, and a physical memory block. The instructor points to the p part of the logical address and shows an arrow pointing to the page table.

  2. 2:00 – 5:00 02:00-05:00

    The instructor moves to the second row. He writes '44' for LA and '64MB' for MM. He calculates the Physical Address (PA) bits as 36. He writes p as 32 and f as 24. He sets the offset d to 12. He then calculates the Page Table Size. He writes the formula '1GB / 4KB' on the board, representing the process size divided by the page size. He performs the calculation using powers of 2, writing '2^30 / 2^12', which simplifies to '2^18'. He then multiplies by 3 bytes per entry, resulting in '768KB'. He writes '768KB' in the PT Size column. He explains that the page table size depends on the number of pages and the size of each entry.

  3. 5:00 – 7:28 05:00-07:28

    In the final segment, the instructor addresses the third row. He writes '39' for LA and '28' for MM. He calculates the Physical Address (PA) bits as 28. He writes p as 8 and f as 18. He sets the offset d to 8. He writes '512MB' for the Process Size. He completes the table, showing how different memory configurations affect the address structure and page table size. He writes the final values for p, f, and d to complete the third scenario. The instructor ensures all columns are filled for the third row, finalizing the set of examples.

The lecture systematically breaks down the components of paging hardware. By solving three distinct problems, the instructor reinforces the concepts of address translation, page table indexing, and memory size calculations. The visual aids, including the table and the hardware diagram, help clarify the abstract concepts of logical and physical addressing. The progression from simple bit calculations to page table size calculations demonstrates the increasing complexity of memory management.

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