Set Associative Mapping Part-2
Duration: 4 min
This video lesson is available to enrolled students.
Inside: a video lesson and guided study material.
Module outline
- About the course: About the Course
- Mathematical Aptitude: संख्या पद्धति / Number System, महत्तम समापवर्तक और लघुत्तम समापवर्त्य / HCF and LCM, Divisibility Rules, प्रतिशत / Percentage, अनुपात और समानुपात / Ratio and Proportion, औसत / Average, लाभ, हानि और बट्टा / Profit, Loss and Discount, समय और कार्य / Time and Work, घन क्षेत्रमिति / Solid Mensuration, साधारण और चक्रवृद्धि ब्याज / Simple and Compound Interest, समय, चाल और दूरी / Time, Speed and Distance, Age Problems, मिश्रण और एलिगेशन / Mixture and Alligation, Algebra, सरलीकरण, घातांक और करणी / Simplification, Indices and Surds, Pipe and Cistern, Trigonometry, Statistics, आँकड़ा निर्वचन / Data Interpretation, Arithmetic, समुच्चय, संबंध, फलन और विविक्त गणित / Sets, Relations, Functions and Discrete Mathematics, संख्या पद्धति और संख्या सिद्धांत / Number Systems and Number Theory, निर्देशांक ज्यामिति, सदिश और त्रिविमीय ज्यामिति / Coordinate Geometry, Vectors and 3D Geometry, बहुपद, समीकरण और सम्मिश्र संख्याएँ / Polynomials, Equations and Complex Numbers
- Logical Reasoning: श्रेणी / Series, कूट लेखन एवं कूट वाचन / Coding-Decoding, सादृश्यता एवं वर्गीकरण / Analogy and Classification, रक्त संबंध / Blood Relations, दिशा एवं दूरी / Direction and Distance, क्रम एवं रैंकिंग / Order and Ranking, अशाब्दिक तर्क / Non-Verbal Reasoning, बैठक व्यवस्था एवं पहेलियाँ / Seating Arrangement and Puzzles, Syllogisms, वेन आरेख, न्याय वाक्य एवं असमानता / Venn Diagrams, Syllogism and Inequalities, गणितीय संक्रियाएँ एवं लुप्त संख्या / Mathematical Operations and Missing Numbers, वर्णमाला एवं संख्या परीक्षण / Alphabet and Number Test, कथन आधारित तार्किक विवेचन / Statement-Based Reasoning, Analytical Reasoning (Counting Figures Reasoning), घन, पासा एवं आकृतियों की गिनती / Cubes, Dice and Figure Counting, कैलेंडर एवं घड़ी / Calendar and Clock, Clock
- General Knowledge: वैज्ञानिक उपलब्धियाँ और अनुसंधान / Scientific Achievements and Research, Chemistry, Biology, History, Geography, Polity, Indian Economy, समसामयिकी / Current Affairs, Static General Knowledge
- Art of Teaching: शिक्षण-अधिगम प्रक्रिया एवं कक्षा प्रबंधन / Teaching-Learning Process and Classroom Management, Learners & Learning Process, Factors Affecting Teaching, शिक्षण विधियाँ एवं उपागम / Teaching Methods and Approaches, सूक्ष्म शिक्षण एवं कक्षा संप्रेषण / Microteaching and Classroom Communication, शिक्षण सहायक सामग्री एवं शैक्षिक तकनीकी / Teaching Aids and Educational Technology, आकलन एवं मूल्यांकन / Assessment and Evaluation, शिक्षक: गुण, व्यावसायिक नैतिकता एवं विकास / Teacher: Qualities, Professional Ethics and Development, शैक्षिक नीतियाँ, अधिनियम एवं प्रशासन / Educational Policies, Acts and Administration, पाठ्यचर्या, कला एवं सह-शैक्षिक क्षेत्र / Curriculum, Arts and Co-curricular Areas, निर्देशन एवं परामर्श / Guidance and Counselling, दिव्यांग बच्चों की शिक्षा / Education of Children with Disabilities, Micro-Teaching & Teaching Skills, पाठ योजना / Lesson Planning
- Environmental Science: Environment
- Unit 1 | Digital Electronics: Digital Systems & Boolean Basics, Logic Gates & Hardware, Boolean Expression, Boolean Minimization, Combinational Circuit, Sequential Circuits, Number System, Number Representation
- Unit 2 | COA: Basics of COA, Floating Point Rep, Cache Memory Organization, Input Output Organisation, Instr Formats & Modes, Control Unit Design, Register Transfer and Microoperations, Programming the Basic Computer
- Unit 3 | C Programming: C Fundamentals, Control Flow, Functions, Arrays & Pointers, Storage Classes, Structures & Enums, DMA, Macros, Scoping & File Handling
- Unit 3 | Data Structures: Introduction to DS, Array, Stack, Queue, Linked List, Tree, Graphs, Hashing
- Unit 4 | Algorithms: Algorithm Analysis, Time Complexity Analysis, Sorting Algorithms, Dynamic Programming, Minimum Spanning Trees, Shortest Path Algos, Advanced Algorithms
- Unit 5 | Operating System: Introduction to OS, Process Management, CPU Scheduling, Process Synchronization, Threads & Process Creation, Deadlock, Memory Management, Virtual Memory, Disc Scheduling, File Management
- Unit 6 | Database Management System: Basics of DBMS, ER Diagram, Relational Model & Functional Dependencies, Keys & Integrity Constraints, Normalization (1NF - BCNF), Decomposition Properties & 4NF, File Organization & Indexing, Relational Algebra, SQL, Transaction Management, Concurrency Control
- Unit 7 | Computer Networks: Introduction to CN, Data Communication, DLL: Access Control, DLL: Flow Control, DLL: Error Control, DLL: Framing, Data Link Layer - Ethernet, Net Layer: IPv4 & Proto, Net Layer: IP Addressing, Net Layer:Routing Protocol, Transport Layer Services, TL: Congestion & UDP, Application Layer
- Unit 8 | Software Engineering: Fundamentals of Software Engineering, Software Requirements and Quality Assurance, Software Design, Estimation and Metrics, Software Testing, Software Maintenance and Configuration Management
- Unit 9 | Object Oriented Programming: OOPS with C++
- Unit 10 | Web Development: HTML Basics, CSS, JavaScript-Basics, XML, Node.js
- Unit 11 | Theory Of Computation: Introduction to TOC, Deterministic FA (DFA), Non-Deterministic FA, Regular Expressions, Grammar, Regular Language Properties, Moore & Mealy Machines, Pushdown Automata & CFG, Turing Machines
- Unit 12 | IoT: Emerging Tech Trends, Cloud Computing, कंप्यूटर नेटवर्क / Computer Networks
- Unit 13 | Artificial Intelligence: Approaches to AI, Search Algorithms, Game Playing, Knowledge Representation, Natural Language Processing, Artificial Neural Networks, Genetic Algorithms
- Unit 14 | E-Commerce: Electronic Data Interchange and E-Commerce, Role of Internet and Web Services, Security in Mobile and Wireless Computing, Physical Security and Cryptography Basics, Cyber Safety and Security
- Unit 15 | Multimedia: Multimedia
- Unit 16 | Python: Introduction to Python, Tokens, Variables, Data Types, I/O, Operators & Expressions, Control Flow & Looping, Collections & Strings, Functions & Modules, File Handling & Data Analysis, DSA using Python
- Full Length Mock Tests — General Paper:
- Full Length Mock Tests — Computer Science (Paper II):
AI summary & chapters
AI Summary
An AI-generated summary of this video lecture.
The video lecture focuses on set-associative cache mapping in computer architecture. The instructor begins by defining the structure of physical addresses and cache lines, specifically breaking down the address into Tag, Set, and Block Offset fields. He uses diagrams to illustrate how main memory blocks are mapped to cache sets. The lecture progresses to a concrete example involving a 2-way set-associative cache with 4 cache lines (2 sets) and 16 main memory blocks. Finally, the hardware implementation of this mapping is explained using a block diagram showing multiplexers, comparators, and the selection logic.
Chapters
0:00 – 2:00 00:00-02:00
The instructor introduces the formula for the number of sets and breaks down the physical address structure. He displays a diagram where the 'Main Memory (Physical Address)' is split into 'Block Number' and 'Block Offset'. He annotates the diagram with bit counts, writing '8' for the Block Number and '2' for the Block Offset. He then transitions to the cache structure, showing 'Tag', 'Set', and 'Block Offset'. He writes '2' for Tag bits and '2' for Cache Line (Set) bits in one example, and later '3' for Tag and '1' for Set in another, illustrating how address bits are allocated. He writes 'Bits Transferred' with values like '2w', '4w', '3w', '8w', likely referring to word sizes or data transfer widths associated with the cache lines. He circles 'Set 1' in the lower diagram to emphasize the set selection process.
2:00 – 4:17 02:00-04:17
The lecture moves to a specific mapping example. A diagram shows a cache with 'Set Number-0' (containing CL-0, CL-1) and 'Set Number-1' (containing CL-2, CL-3) connected to main memory blocks B-0 through B-15. The instructor writes a binary address '1001 01' at the top. He draws lines connecting specific cache lines to memory blocks, highlighting B-8 and B-9. A detailed table is shown mapping Set Numbers to Cache Lines (CL-0 to CL-3) and listing the specific Blocks (B-0, B-2, etc.) and Words (W-0, W-1, etc.) stored in each. The instructor then presents a 'Hardware Architecture' diagram for 2-Way Set Associative Mapping. This diagram illustrates the flow from Tag, Set Number, and Block Offset inputs through Multiplexers to select a set, then through Comparators to check the Tag, and finally through an OR gate to produce the result. He highlights 'Set-1 (Selected)' in the cache memory block to demonstrate the selection mechanism.
The video provides a comprehensive overview of set-associative cache mapping, starting from theoretical address breakdown to practical hardware implementation. The instructor effectively uses diagrams to visualize the relationship between main memory blocks and cache sets, demonstrating how address bits are partitioned into Tag, Set, and Offset. The transition from abstract formulas to a concrete 2-way set-associative example with 16 memory blocks helps clarify the mapping process. The final hardware architecture diagram ties the concepts together by showing the physical components like multiplexers and comparators required to execute the mapping logic, ensuring students understand both the logical structure and the physical realization of cache memory systems.