Decoders

Duration: 5 min

This video lesson is available to enrolled students.

Return to /learn/BIHAR-STET-COMPUTER-SCIENCE-COMPLETE-COURSE/unit-1-digital-electronics/combinational-circuit/demux-decoder-encoder/asset-decoders after enrolling

Inside: a video lesson and guided study material.

Module outline

  1. About the course: About the Course
  2. Mathematical Aptitude: संख्या पद्धति / Number System, महत्तम समापवर्तक और लघुत्तम समापवर्त्य / HCF and LCM, Divisibility Rules, प्रतिशत / Percentage, अनुपात और समानुपात / Ratio and Proportion, औसत / Average, लाभ, हानि और बट्टा / Profit, Loss and Discount, समय और कार्य / Time and Work, घन क्षेत्रमिति / Solid Mensuration, साधारण और चक्रवृद्धि ब्याज / Simple and Compound Interest, समय, चाल और दूरी / Time, Speed and Distance, Age Problems, मिश्रण और एलिगेशन / Mixture and Alligation, Algebra, सरलीकरण, घातांक और करणी / Simplification, Indices and Surds, Pipe and Cistern, Trigonometry, Statistics, आँकड़ा निर्वचन / Data Interpretation, Arithmetic, समुच्चय, संबंध, फलन और विविक्त गणित / Sets, Relations, Functions and Discrete Mathematics, संख्या पद्धति और संख्या सिद्धांत / Number Systems and Number Theory, निर्देशांक ज्यामिति, सदिश और त्रिविमीय ज्यामिति / Coordinate Geometry, Vectors and 3D Geometry, बहुपद, समीकरण और सम्मिश्र संख्याएँ / Polynomials, Equations and Complex Numbers
  3. Logical Reasoning: श्रेणी / Series, कूट लेखन एवं कूट वाचन / Coding-Decoding, सादृश्यता एवं वर्गीकरण / Analogy and Classification, रक्त संबंध / Blood Relations, दिशा एवं दूरी / Direction and Distance, क्रम एवं रैंकिंग / Order and Ranking, अशाब्दिक तर्क / Non-Verbal Reasoning, बैठक व्यवस्था एवं पहेलियाँ / Seating Arrangement and Puzzles, Syllogisms, वेन आरेख, न्याय वाक्य एवं असमानता / Venn Diagrams, Syllogism and Inequalities, गणितीय संक्रियाएँ एवं लुप्त संख्या / Mathematical Operations and Missing Numbers, वर्णमाला एवं संख्या परीक्षण / Alphabet and Number Test, कथन आधारित तार्किक विवेचन / Statement-Based Reasoning, Analytical Reasoning (Counting Figures Reasoning), घन, पासा एवं आकृतियों की गिनती / Cubes, Dice and Figure Counting, कैलेंडर एवं घड़ी / Calendar and Clock, Clock
  4. General Knowledge: वैज्ञानिक उपलब्धियाँ और अनुसंधान / Scientific Achievements and Research, Chemistry, Biology, History, Geography, Polity, Indian Economy, समसामयिकी / Current Affairs, Static General Knowledge
  5. Art of Teaching: शिक्षण-अधिगम प्रक्रिया एवं कक्षा प्रबंधन / Teaching-Learning Process and Classroom Management, Learners & Learning Process, Factors Affecting Teaching, शिक्षण विधियाँ एवं उपागम / Teaching Methods and Approaches, सूक्ष्म शिक्षण एवं कक्षा संप्रेषण / Microteaching and Classroom Communication, शिक्षण सहायक सामग्री एवं शैक्षिक तकनीकी / Teaching Aids and Educational Technology, आकलन एवं मूल्यांकन / Assessment and Evaluation, शिक्षक: गुण, व्यावसायिक नैतिकता एवं विकास / Teacher: Qualities, Professional Ethics and Development, शैक्षिक नीतियाँ, अधिनियम एवं प्रशासन / Educational Policies, Acts and Administration, पाठ्यचर्या, कला एवं सह-शैक्षिक क्षेत्र / Curriculum, Arts and Co-curricular Areas, निर्देशन एवं परामर्श / Guidance and Counselling, दिव्यांग बच्चों की शिक्षा / Education of Children with Disabilities, Micro-Teaching & Teaching Skills, पाठ योजना / Lesson Planning
  6. Environmental Science: Environment
  7. Unit 1 | Digital Electronics: Digital Systems & Boolean Basics, Logic Gates & Hardware, Boolean Expression, Boolean Minimization, Combinational Circuit, Sequential Circuits, Number System, Number Representation
  8. Unit 2 | COA: Basics of COA, Floating Point Rep, Cache Memory Organization, Input Output Organisation, Instr Formats & Modes, Control Unit Design, Register Transfer and Microoperations, Programming the Basic Computer
  9. Unit 3 | C Programming: C Fundamentals, Control Flow, Functions, Arrays & Pointers, Storage Classes, Structures & Enums, DMA, Macros, Scoping & File Handling
  10. Unit 3 | Data Structures: Introduction to DS, Array, Stack, Queue, Linked List, Tree, Graphs, Hashing
  11. Unit 4 | Algorithms: Algorithm Analysis, Time Complexity Analysis, Sorting Algorithms, Dynamic Programming, Minimum Spanning Trees, Shortest Path Algos, Advanced Algorithms
  12. Unit 5 | Operating System: Introduction to OS, Process Management, CPU Scheduling, Process Synchronization, Threads & Process Creation, Deadlock, Memory Management, Virtual Memory, Disc Scheduling, File Management
  13. Unit 6 | Database Management System: Basics of DBMS, ER Diagram, Relational Model & Functional Dependencies, Keys & Integrity Constraints, Normalization (1NF - BCNF), Decomposition Properties & 4NF, File Organization & Indexing, Relational Algebra, SQL, Transaction Management, Concurrency Control
  14. Unit 7 | Computer Networks: Introduction to CN, Data Communication, DLL: Access Control, DLL: Flow Control, DLL: Error Control, DLL: Framing, Data Link Layer - Ethernet, Net Layer: IPv4 & Proto, Net Layer: IP Addressing, Net Layer:Routing Protocol, Transport Layer Services, TL: Congestion & UDP, Application Layer
  15. Unit 8 | Software Engineering: Fundamentals of Software Engineering, Software Requirements and Quality Assurance, Software Design, Estimation and Metrics, Software Testing, Software Maintenance and Configuration Management
  16. Unit 9 | Object Oriented Programming: OOPS with C++
  17. Unit 10 | Web Development: HTML Basics, CSS, JavaScript-Basics, XML, Node.js
  18. Unit 11 | Theory Of Computation: Introduction to TOC, Deterministic FA (DFA), Non-Deterministic FA, Regular Expressions, Grammar, Regular Language Properties, Moore & Mealy Machines, Pushdown Automata & CFG, Turing Machines
  19. Unit 12 | IoT: Emerging Tech Trends, Cloud Computing, कंप्यूटर नेटवर्क / Computer Networks
  20. Unit 13 | Artificial Intelligence: Approaches to AI, Search Algorithms, Game Playing, Knowledge Representation, Natural Language Processing, Artificial Neural Networks, Genetic Algorithms
  21. Unit 14 | E-Commerce: Electronic Data Interchange and E-Commerce, Role of Internet and Web Services, Security in Mobile and Wireless Computing, Physical Security and Cryptography Basics, Cyber Safety and Security
  22. Unit 15 | Multimedia: Multimedia
  23. Unit 16 | Python: Introduction to Python, Tokens, Variables, Data Types, I/O, Operators & Expressions, Control Flow & Looping, Collections & Strings, Functions & Modules, File Handling & Data Analysis, DSA using Python
  24. Full Length Mock Tests — General Paper:
  25. Full Length Mock Tests — Computer Science (Paper II):
AI summary & chapters

AI Summary

An AI-generated summary of this video lecture.

This lecture demonstrates how to construct a 4-to-16-line decoder using two 3-to-8-line decoders with enable inputs. The instructor begins by drawing a block diagram for the target 4x16 decoder, labeling its four inputs as I0 (LSB) through I3 (MSB) and its sixteen outputs as D0 to D15. The solution involves using the three lower-order bits (I0, I1, I2) as common data inputs to both 3x8 decoder blocks. The most significant bit (I3) is used to control the enable inputs of each decoder: when I3=0, the upper decoder is enabled to produce outputs D0-D7; when I3=1, an inverter allows the lower decoder to be enabled to produce outputs D8-D15. This method effectively doubles the output capacity of a 3x8 decoder to create a 4x16 decoder.

Chapters

  1. 0:00 – 2:00 00:00-02:00

    The instructor introduces the problem of connecting two 3-to-8-line decoders to form a 4-to-16-line decoder. A block diagram for the target '4x16 Decoder' is drawn on the whiteboard, with inputs labeled I0 (LSB) to I3 (MSB) and outputs D0 to D15. The instructor then begins drawing the first 3x8 decoder block, labeling its inputs I0, I1, I2 and an enable input E.

  2. 2:00 – 5:00 02:00-05:00

    The instructor draws a second 3x8 decoder block in green ink, stacking it below the first. The inputs I0, I1, and I2 are connected to both decoders. The MSB (I3) is circled in red and wired to the enable inputs of both decoders. An inverter is added between I3 and the upper decoder's enable pin, while a direct connection is made to the lower decoder. The outputs are labeled D0-D7 for the upper block and D8-D15 for the lower block.

  3. 5:00 – 5:19 05:00-05:19

    The final diagram is completed, showing the logic conditions for each decoder. The instructor writes 'I3=0' and 'I3=1' to indicate the enable states. The outputs of both 3x8 decoders are connected to the final 4x16 decoder block, demonstrating how the MSB selects which half of the output range is active based on the enable logic.

The core concept taught is decoder expansion using enable inputs. By sharing the lower-order address lines (I0-I2) across multiple smaller decoders and using the higher-order bit (I3) to control their enable pins, a larger decoder can be synthesized. The use of an inverter on one enable line ensures that only one 3x8 decoder is active at any given time, preventing output conflicts and correctly mapping the 4-bit input to one of sixteen unique outputs.

Loading lesson…