Decoder
Duration: 1 min
This video lesson is available to enrolled students.
Inside: a video lesson and guided study material.
Module outline
- Discrete Mathematics: Permutation, Combination and Probability / क्रमचय, संचय एवं प्रायिकता, Set Theory, Relations, Functions, Propositional and Predicate Logic, Graph Theory, Group Theory
- Digital Logic: Digital Systems & Boolean Basics, Boolean Expression, Boolean Minimization, Logic Gates & Hardware, Combinational Circuit, Sequential Circuits, Number System, Number Representation, Floating Point Rep
- Computer Organization and Architecture: Basics of COA, Programming the Basic Computer, Cache Memory Organization, Input Output Organisation, Instr Formats & Modes, Register Transfer and Microoperations, Control Unit Design, Pipelining, Multiprocessors
- Programming: Language Design, C Fundamentals, Control Flow, Functions, Arrays & Pointers, Storage Classes, Structures & Enums, DMA, Macros, Scoping & File Handling, OOPS with C++
- Data Structures: Introduction to DS, Array, Linked List, Stack, Queue, Tree, Graphs, Hashing
- Algorithms: Algorithm Analysis, Time Complexity Analysis, Sorting Algorithms, Greedy Algorithms, Dynamic Programming, Minimum Spanning Trees, Shortest Path Algos, Advanced Algorithms
- Theory of Computation: Grammar, Regular Language Properties, Moore & Mealy Machines, Turing Machines
- Compiler Design: Intro to Compilers, Lexical Analysis, Grammar & CFG, Syntax Analysis: Top-Down, Syntax Analysis: Bottom-Up, Semantic Analysis & SDT, Intermediate Code Gen, Code Optimization, Run Time Environment, Introduction to TOC, Deterministic FA (DFA), Non-Deterministic FA, Regular Expressions, Pushdown Automata & CFG, Complexity Theory
- Operating Systems: Introduction to OS, Process Management, CPU Scheduling, Process Synchronization, Threads & Process Creation, Deadlock, Memory Management, Virtual Memory, Disc Scheduling, File Management, Unix OS, Linux OS, Security
- Database Management Systems: Basics of DBMS, ER Diagram, Relational Model & Functional Dependencies, Keys & Integrity Constraints, Normalization (1NF - BCNF), Decomposition Properties & 4NF, File Organization & Indexing, Relational Algebra, SQL, Relational Calculus, Transaction Management, Concurrency Control, ORDBMS, NoSQL
- Computer Networks: Introduction to CN, Data Communication, DLL: Access Control, DLL: Flow Control, DLL: Error Control, DLL: Framing, Data Link Layer - Ethernet, Net Layer: IPv4 & Proto, Net Layer: IP Addressing, Net Layer:Routing Protocol, Transport Layer Services, TL: Congestion & UDP, Application Layer, Hardware basics, Network Security
AI summary & chapters
AI Summary
An AI-generated summary of this video lecture.
The video presents a digital logic design problem: constructing a 7-to-128 decoder using 3-to-8 decoders. The instructor writes the question "Q 7-to-128 from 3-to-8?" in orange text. He then uses red marker to draw a hierarchical tree structure on the whiteboard to solve it. The diagram consists of boxes representing the decoders, arranged in levels. He circles numbers like 16 and 128 to denote the number of blocks and total outputs. He performs a calculation "1 + 2 + 16" to determine the total count of decoders required, circling the final answer "19". He also writes "16 x 8" to verify the output capacity.
Chapters
0:00 – 1:09 00:00-01:09
The video covers the entire derivation process. Initially, the question is displayed. The instructor draws a vertical tree of boxes. He writes "16" and "128" near the bottom, indicating the leaf nodes. He writes "1 + 2 + 16" on the left side. He circles "19" as the sum. He writes "16 x 8" and circles "128" to show the multiplication. He also writes "8" at the bottom. The drawing shows a top box, a middle section, and a bottom section of boxes. He also circles a number "65" which appears to be a draft or intermediate value before settling on the final calculation.
The instructor demonstrates a systematic method for expanding decoder capabilities. By organizing the 3-to-8 decoders into three levels (1 top, 2 middle, 16 bottom), he ensures all 7 input lines are utilized to select the correct output among 128 possibilities. The calculation confirms that 19 individual 3-to-8 decoders are necessary to build the larger 7-to-128 unit. This hierarchical approach allows for modular design of complex digital circuits.

