Basics of DeMultiplexer

Duration: 4 min

This video lesson is available to enrolled students.

Return to /learn/BIHAR-POLYTECHNIC-LECTURER-COMPUTER-SCIENCE/digital-logic/combinational-circuit/demux-decoder-encoder/asset-basics-of-demultiplexer after enrolling

Inside: a video lesson and guided study material.

Module outline

  1. Discrete Mathematics: Permutation, Combination and Probability / क्रमचय, संचय एवं प्रायिकता, Set Theory, Relations, Functions, Propositional and Predicate Logic, Graph Theory, Group Theory
  2. Digital Logic: Digital Systems & Boolean Basics, Boolean Expression, Boolean Minimization, Logic Gates & Hardware, Combinational Circuit, Sequential Circuits, Number System, Number Representation, Floating Point Rep
  3. Computer Organization and Architecture: Basics of COA, Programming the Basic Computer, Cache Memory Organization, Input Output Organisation, Instr Formats & Modes, Register Transfer and Microoperations, Control Unit Design, Pipelining, Multiprocessors
  4. Programming: Language Design, C Fundamentals, Control Flow, Functions, Arrays & Pointers, Storage Classes, Structures & Enums, DMA, Macros, Scoping & File Handling, OOPS with C++
  5. Data Structures: Introduction to DS, Array, Linked List, Stack, Queue, Tree, Graphs, Hashing
  6. Algorithms: Algorithm Analysis, Time Complexity Analysis, Sorting Algorithms, Greedy Algorithms, Dynamic Programming, Minimum Spanning Trees, Shortest Path Algos, Advanced Algorithms
  7. Theory of Computation: Grammar, Regular Language Properties, Moore & Mealy Machines, Turing Machines
  8. Compiler Design: Intro to Compilers, Lexical Analysis, Grammar & CFG, Syntax Analysis: Top-Down, Syntax Analysis: Bottom-Up, Semantic Analysis & SDT, Intermediate Code Gen, Code Optimization, Run Time Environment, Introduction to TOC, Deterministic FA (DFA), Non-Deterministic FA, Regular Expressions, Pushdown Automata & CFG, Complexity Theory
  9. Operating Systems: Introduction to OS, Process Management, CPU Scheduling, Process Synchronization, Threads & Process Creation, Deadlock, Memory Management, Virtual Memory, Disc Scheduling, File Management, Unix OS, Linux OS, Security
  10. Database Management Systems: Basics of DBMS, ER Diagram, Relational Model & Functional Dependencies, Keys & Integrity Constraints, Normalization (1NF - BCNF), Decomposition Properties & 4NF, File Organization & Indexing, Relational Algebra, SQL, Relational Calculus, Transaction Management, Concurrency Control, ORDBMS, NoSQL
  11. Computer Networks: Introduction to CN, Data Communication, DLL: Access Control, DLL: Flow Control, DLL: Error Control, DLL: Framing, Data Link Layer - Ethernet, Net Layer: IPv4 & Proto, Net Layer: IP Addressing, Net Layer:Routing Protocol, Transport Layer Services, TL: Congestion & UDP, Application Layer, Hardware basics, Network Security
AI summary & chapters

AI Summary

An AI-generated summary of this video lecture.

This educational video segment introduces the Demultiplexer (DeMux), a fundamental digital logic component. The instructor defines it as a device that accepts a single input line and routes it to one of several digital output lines, effectively acting as a data distributor. He contrasts it with a Multiplexer (Mux), noting it operates with reverse logic. The lecture visually demonstrates the switching mechanism and then formalizes the structure using a block diagram with 2^n outputs controlled by n select lines. Finally, the instructor outlines practical applications, identifying the DeMux as a combinational circuit used in data communication, serial-to-parallel conversion, and Boolean function generation.

Chapters

  1. 0:00 – 2:00 00:00-02:00

    The instructor begins by presenting the definition of a Demultiplexer on the slide, stating it is a device that takes a single input line and routes it to one of several digital output lines. He highlights that a demultiplexer is also called a 'data distributor' and is conceptually the same as a Mux but with reverse logic. To visualize this, a diagram shows a single 'Input' line connected to a switch that can direct the signal to one of four outputs labeled Y0, Y1, Y2, and Y3. The instructor uses a pen to draw a switch symbol over the diagram, underlining the text 'several digital output lines' to emphasize the distribution nature of the circuit. He draws a box around the switch and outputs to represent the device boundary.

  2. 2:00 – 3:45 02:00-03:45

    The lecture advances to the general structure of a demultiplexer, displaying text that explains a demultiplexer of 2^n outputs has n select lines used to select the specific output line. A block diagram labeled 'De-MUX 1x2^n' is shown with an input 'I', outputs ranging from O0 to O(2^n-1), and select lines S0 through Sn-1. The instructor writes '32' next to the outputs and '5' under the select lines to provide a concrete example of a 1x32 demultiplexer requiring 5 select lines. The slide then lists applications, noting that a DeMux is a combinational circuit used in data communication and serial-to-parallel conversion. The instructor underlines 'Boolean function generators' and 'decoder circuits' as main uses, while mentioning that different configurations are available as single integrated circuits (ICs).

The video provides a comprehensive introduction to Demultiplexers, starting with a conceptual definition and visual analogy of a switch. It transitions into a formal block diagram representation, establishing the mathematical relationship where n select lines control 2^n outputs. The lesson concludes by categorizing the DeMux as a combinational circuit and listing its primary applications in data communication, serial-to-parallel conversion, and logic design, specifically within Boolean function generators and decoder circuits, ensuring students understand both the theory and practical implementation.

Loading lesson…