Practice_Question_Os_physical Addressing
Duration: 2 min
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Module outline
- Quantitative Ability: Percentage, Profit and Loss, Ratio and Proportion (Ratios), Average, Time and Work, Speed Time and Distance, Simple Interest and Compound Interest, Age Problems, Number System, Divisibility Rules, HCF LCM, Algebra, Permutation and Combination, Probability, Data Interpretation, Logarithm, Sequence and Series (Series), Powers and Exponents (Surds and Indices), Speed Mathematics and Basic Mathematics
- Logical Reasoning: Seating Arrangements, Puzzle Solving (Puzzles), Data Arrangement, Coding Decoding, Blood Relations, Directions (Direction Test), Ranking, Order and Sequence, Data Sufficiency, Venn Diagram, Inequality, Series (Number and Letter Series) (Numerical Relations and Reasoning), Logical Sequence Of Words, Deductive and Inductive Reasoning (Logical Deduction and Induction) (Prepositional Reasoning), Selection Decision Table (Decision Making), Analogy, Non Verbal Reasoning (Spatial Aptitude) (Spatial Reasoning) (Visual Reasoning)
- Verbal Ability: Comprehension / Reading Comprehension / Unseen Passages (Critical Reasoning) (Paragraph Questions), Subject Verb Agreement (Verb Noun Agreement), Tenses, Articles, Preposition, Conjunction, Modals, Active Passive Voice (Voice), Direct and Indirect Speech, Vocabulary, Sentence Re-arrangements (Para Jumbles) (Narrative Sequencing), Sentence Completion (Fill in the blanks), Sentence Correction (Error Correction), Cloze Test (Cloze Passage), Facts, Inference and Judgements
- Programming Fundamentals (Technical): C Fundamentals
- Data Structures (Technical): Introduction to DS, Array, Stack, Queue, Linked List, Tree, Graphs, Hashing
- Algorithms (Technical): Algorithm Analysis, Sorting Algorithms, Greedy Algorithms, Dynamic Programming, Minimum Spanning Trees, Shortest Path Algos, Time Complexity Analysis, Advanced Algorithms
- OOPs (Technical): Object Oriented Programming (OOPS)
- DBMS (Technical): Basics of DBMS, ER Diagram, Relational Model & Functional Dependencies, Keys & Integrity Constraints, Normalization (1NF - BCNF), Decomposition Properties & 4NF, File Organization & Indexing, Relational Algebra, Relational Calculus, Transaction Management, Concurrency Control, Database Recovery, ORDBMS, Database Security & Authorization, Query Processing & Optimization, Enhanced Data Models, Data Warehousing & Mining, Big Data Systems, NoSQL
- SQL (Technical): SQL
- Operating Systems (Technical): Introduction to OS, Process Management, CPU Scheduling, Process Synchronization, Deadlock, Threads & Process Creation, Memory Management, Virtual Memory, Disc Scheduling, File Management, Windows OS, Linux OS, Security, Distributed Systems, Virtual Machines
- Computer Networks (Technical): Introduction to CN, Data Communication, DLL: Access Control, DLL: Flow Control, DLL: Error Control, DLL: Framing, Data Link Layer - Ethernet, Net Layer: IPv4 & Proto, Net Layer: IP Addressing, Net Layer:Routing Protocol, Transport Layer Services, TL: Congestion & UDP, Application Layer, Hardware basics, Network Security, Mobile Technology, Cloud Computing and IoT, Cyber and Info Security
- Software Engineering (Technical): Fundamentals of Software Engineering, Software Requirements and Quality Assurance, Software Design, Estimation and Metrics, Software Testing, Software Maintenance and Configuration Management
- Coding/Automata Round: Coding Questions by Yash Sir, C Programming by Yash Sir, Programming in C++, Java, Python for Placements by Yash Sir, Pseudo Codes
- Personality / Behavioral Assessment: Behavioral Assessment (Behavioral Competency Profiling) (Psychometric Test)
- Writing Assessment: English Writing Ability
AI summary & chapters
AI Summary
An AI-generated summary of this video lecture.
The video presents a problem involving memory management in operating systems, specifically focusing on the use of relocation and limit registers to determine valid memory access. The instructor displays a table listing five processes (P0 to P4) with their corresponding Limit and Relocation register values. Below the table, a list of logical address requests from these processes is provided. The core task is to evaluate each request to determine if it is legal (within bounds) or illegal (out of bounds) and, if legal, to calculate the resulting physical address. The instructor systematically analyzes each process request, comparing the requested logical address against the process's limit register value. For valid requests, he demonstrates the calculation of the physical address by adding the logical address to the base address found in the relocation register.
Chapters
0:00 – 2:00 00:00-02:00
The instructor begins by analyzing the first request from process P0, which is 450. He checks the limit register for P0, which is 500. Since 450 is less than 500, he marks it as legal. He then calculates the physical address by adding the logical address (450) to the relocation register value (1200), resulting in 1650. Next, he moves to P1 with a request of 300. The limit register for P1 is 275. Since 300 is greater than 275, he marks this attempt as illegal. He proceeds to P2 with a request of 210. The limit is 212, so 210 is valid. He calculates the physical address as 880 + 210 = 1090. Then, for P3, the request is 450, but the limit is 420, making it illegal. Finally, he addresses P4 with a request of 80. The limit is 118, so it is legal, and the physical address is calculated as 200 + 80.
2:00 – 2:16 02:00-02:16
The instructor completes the calculation for process P4. He writes down the sum of the relocation register (200) and the logical address (80), resulting in a physical address of 280. He circles the final answer and briefly concludes the problem-solving session, having successfully identified the illegal attempts and calculated the physical addresses for the valid ones.
The lesson effectively demonstrates the mechanism of address binding and protection in memory management. By comparing logical addresses against limit registers, the system ensures processes do not access unauthorized memory regions. The addition of the relocation register value shifts the logical address space to the correct physical location, illustrating how dynamic relocation works in a multitasking environment.